Merge tag 'rdma-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland...
[cascardo/linux.git] / arch / arm / boot / dts / sun5i-a10s.dtsi
index 2e7d826..2fd8988 100644 (file)
  * http://www.gnu.org/copyleft/gpl.html
  */
 
-/include/ "skeleton.dtsi"
+#include "skeleton.dtsi"
+
+#include <dt-bindings/dma/sun4i-a10.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
 
 / {
        interrupt-parent = <&intc>;
                                 <&ahb_gates 44>;
                        status = "disabled";
                };
+
+               framebuffer@1 {
+                       compatible = "allwinner,simple-framebuffer",
+                                    "simple-framebuffer";
+                       allwinner,pipeline = "de_be0-lcd0";
+                       clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>;
+                       status = "disabled";
+               };
        };
 
        cpus {
                };
 
                mmc0_clk: clk@01c20088 {
-                       #clock-cells = <0>;
-                       compatible = "allwinner,sun4i-a10-mod0-clk";
+                       #clock-cells = <1>;
+                       compatible = "allwinner,sun4i-a10-mmc-clk";
                        reg = <0x01c20088 0x4>;
                        clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-                       clock-output-names = "mmc0";
+                       clock-output-names = "mmc0",
+                                            "mmc0_output",
+                                            "mmc0_sample";
                };
 
                mmc1_clk: clk@01c2008c {
-                       #clock-cells = <0>;
-                       compatible = "allwinner,sun4i-a10-mod0-clk";
+                       #clock-cells = <1>;
+                       compatible = "allwinner,sun4i-a10-mmc-clk";
                        reg = <0x01c2008c 0x4>;
                        clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-                       clock-output-names = "mmc1";
+                       clock-output-names = "mmc1",
+                                            "mmc1_output",
+                                            "mmc1_sample";
                };
 
                mmc2_clk: clk@01c20090 {
-                       #clock-cells = <0>;
-                       compatible = "allwinner,sun4i-a10-mod0-clk";
+                       #clock-cells = <1>;
+                       compatible = "allwinner,sun4i-a10-mmc-clk";
                        reg = <0x01c20090 0x4>;
                        clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-                       clock-output-names = "mmc2";
+                       clock-output-names = "mmc2",
+                                            "mmc2_output",
+                                            "mmc2_sample";
                };
 
                ts_clk: clk@01c20098 {
                        interrupts = <10>;
                        clocks = <&ahb_gates 20>, <&spi0_clk>;
                        clock-names = "ahb", "mod";
-                       dmas = <&dma 1 27>, <&dma 1 26>;
+                       dmas = <&dma SUN4I_DMA_DEDICATED 27>,
+                              <&dma SUN4I_DMA_DEDICATED 26>;
                        dma-names = "rx", "tx";
                        status = "disabled";
                        #address-cells = <1>;
                        interrupts = <11>;
                        clocks = <&ahb_gates 21>, <&spi1_clk>;
                        clock-names = "ahb", "mod";
-                       dmas = <&dma 1 9>, <&dma 1 8>;
+                       dmas = <&dma SUN4I_DMA_DEDICATED 9>,
+                              <&dma SUN4I_DMA_DEDICATED 8>;
                        dma-names = "rx", "tx";
                        status = "disabled";
                        #address-cells = <1>;
                        status = "disabled";
                };
 
-               mdio@01c0b080 {
+               mdio: mdio@01c0b080 {
                        compatible = "allwinner,sun4i-a10-mdio";
                        reg = <0x01c0b080 0x14>;
                        status = "disabled";
                mmc0: mmc@01c0f000 {
                        compatible = "allwinner,sun5i-a13-mmc";
                        reg = <0x01c0f000 0x1000>;
-                       clocks = <&ahb_gates 8>, <&mmc0_clk>;
-                       clock-names = "ahb", "mmc";
+                       clocks = <&ahb_gates 8>,
+                                <&mmc0_clk 0>,
+                                <&mmc0_clk 1>,
+                                <&mmc0_clk 2>;
+                       clock-names = "ahb",
+                                     "mmc",
+                                     "output",
+                                     "sample";
                        interrupts = <32>;
                        status = "disabled";
                };
                mmc1: mmc@01c10000 {
                        compatible = "allwinner,sun5i-a13-mmc";
                        reg = <0x01c10000 0x1000>;
-                       clocks = <&ahb_gates 9>, <&mmc1_clk>;
-                       clock-names = "ahb", "mmc";
+                       clocks = <&ahb_gates 9>,
+                                <&mmc1_clk 0>,
+                                <&mmc1_clk 1>,
+                                <&mmc1_clk 2>;
+                       clock-names = "ahb",
+                                     "mmc",
+                                     "output",
+                                     "sample";
                        interrupts = <33>;
                        status = "disabled";
                };
                mmc2: mmc@01c11000 {
                        compatible = "allwinner,sun5i-a13-mmc";
                        reg = <0x01c11000 0x1000>;
-                       clocks = <&ahb_gates 10>, <&mmc2_clk>;
-                       clock-names = "ahb", "mmc";
+                       clocks = <&ahb_gates 10>,
+                                <&mmc2_clk 0>,
+                                <&mmc2_clk 1>,
+                                <&mmc2_clk 2>;
+                       clock-names = "ahb",
+                                     "mmc",
+                                     "output",
+                                     "sample";
                        interrupts = <34>;
                        status = "disabled";
                };
                        interrupts = <12>;
                        clocks = <&ahb_gates 22>, <&spi2_clk>;
                        clock-names = "ahb", "mod";
-                       dmas = <&dma 1 29>, <&dma 1 28>;
+                       dmas = <&dma SUN4I_DMA_DEDICATED 29>,
+                              <&dma SUN4I_DMA_DEDICATED 28>;
                        dma-names = "rx", "tx";
                        status = "disabled";
                        #address-cells = <1>;
                        uart0_pins_a: uart0@0 {
                                allwinner,pins = "PB19", "PB20";
                                allwinner,function = "uart0";
-                               allwinner,drive = <0>;
-                               allwinner,pull = <0>;
+                               allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
                        };
 
                        uart2_pins_a: uart2@0 {
                                allwinner,pins = "PC18", "PC19";
                                allwinner,function = "uart2";
-                               allwinner,drive = <0>;
-                               allwinner,pull = <0>;
+                               allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
                        };
 
                        uart3_pins_a: uart3@0 {
                                allwinner,pins = "PG9", "PG10";
                                allwinner,function = "uart3";
-                               allwinner,drive = <0>;
-                               allwinner,pull = <0>;
+                               allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
                        };
 
                        emac_pins_a: emac0@0 {
                                                "PA11", "PA12", "PA13", "PA14",
                                                "PA15", "PA16";
                                allwinner,function = "emac";
-                               allwinner,drive = <0>;
-                               allwinner,pull = <0>;
+                               allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
                        };
 
                        i2c0_pins_a: i2c0@0 {
                                allwinner,pins = "PB0", "PB1";
                                allwinner,function = "i2c0";
-                               allwinner,drive = <0>;
-                               allwinner,pull = <0>;
+                               allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
                        };
 
                        i2c1_pins_a: i2c1@0 {
                                allwinner,pins = "PB15", "PB16";
                                allwinner,function = "i2c1";
-                               allwinner,drive = <0>;
-                               allwinner,pull = <0>;
+                               allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
                        };
 
                        i2c2_pins_a: i2c2@0 {
                                allwinner,pins = "PB17", "PB18";
                                allwinner,function = "i2c2";
-                               allwinner,drive = <0>;
-                               allwinner,pull = <0>;
+                               allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
                        };
 
                        mmc0_pins_a: mmc0@0 {
                                allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
                                allwinner,function = "mmc0";
-                               allwinner,drive = <2>;
-                               allwinner,pull = <0>;
+                               allwinner,drive = <SUN4I_PINCTRL_30_MA>;
+                               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
                        };
 
                        mmc1_pins_a: mmc1@0 {
                                allwinner,pins = "PG3","PG4","PG5","PG6","PG7","PG8";
                                allwinner,function = "mmc1";
-                               allwinner,drive = <2>;
-                               allwinner,pull = <0>;
+                               allwinner,drive = <SUN4I_PINCTRL_30_MA>;
+                               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
                        };
                };
 
                        reg = <0x01c20c90 0x10>;
                };
 
+               lradc: lradc@01c22800 {
+                       compatible = "allwinner,sun4i-a10-lradc-keys";
+                       reg = <0x01c22800 0x100>;
+                       interrupts = <31>;
+                       status = "disabled";
+               };
+
                sid: eeprom@01c23800 {
                        compatible = "allwinner,sun4i-a10-sid";
                        reg = <0x01c23800 0x10>;
                        compatible = "allwinner,sun4i-a10-ts";
                        reg = <0x01c25000 0x100>;
                        interrupts = <29>;
+                       #thermal-sensor-cells = <0>;
                };
 
                uart0: serial@01c28000 {