ARM: dts: sun9i: a80-optimus: Order nodes by alphabetical order

[cascardo/linux.git] / arch / arm / boot / dts / sun9i-a80-optimus.dts

diff --git a/arch/arm/boot/dts/sun9i-a80-optimus.dts b/arch/arm/boot/dts/sun9i-a80-optimus.dts
index 6cfc021..7fd22e8 100644 (file)
--- a/arch/arm/boot/dts/sun9i-a80-optimus.dts
+++ b/arch/arm/boot/dts/sun9i-a80-optimus.dts
@@ -44,7 +44,6 @@
 
 /dts-v1/;
 #include "sun9i-a80.dtsi"
-#include "sunxi-common-regulators.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/pinctrl/sun4i-a10.h>
@@ -85,6 +84,17 @@
                };
        };
 
+       reg_usb1_vbus: usb1-vbus {
+               compatible = "regulator-fixed";
+               pinctrl-names = "default";
+               pinctrl-0 = <&usb1_vbus_pin_optimus>;
+               regulator-name = "usb1-vbus";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               enable-active-high;
+               gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
+       };
+
        reg_usb3_vbus: usb3-vbus {
                compatible = "regulator-fixed";
                pinctrl-names = "default";
@@ -109,6 +119,31 @@
        status = "okay";
 };
 
+&mmc0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc0_pins>, <&mmc0_cd_pin_optimus>;
+       vmmc-supply = <&reg_dcdc1>;
+       bus-width = <4>;
+       cd-gpios = <&pio 7 18 GPIO_ACTIVE_HIGH>; /* PH8 */
+       cd-inverted;
+       status = "okay";
+};
+
+&mmc2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc2_8bit_pins>;
+       vmmc-supply = <&reg_dcdc1>;
+       bus-width = <8>;
+       non-removable;
+       cap-mmc-hw-reset;
+       status = "okay";
+};
+
+&mmc2_8bit_pins {
+       /* Increase drive strength for DDR modes */
+       allwinner,drive = <SUN4I_PINCTRL_40_MA>;
+};
+
 &ohci0 {
        status = "okay";
 };
@@ -147,37 +182,6 @@
        };
 };
 
-&mmc0 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&mmc0_pins>, <&mmc0_cd_pin_optimus>;
-       vmmc-supply = <&reg_dcdc1>;
-       bus-width = <4>;
-       cd-gpios = <&pio 7 18 GPIO_ACTIVE_HIGH>; /* PH8 */
-       cd-inverted;
-       status = "okay";
-};
-
-&mmc2 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&mmc2_8bit_pins>;
-       vmmc-supply = <&reg_dcdc1>;
-       bus-width = <8>;
-       non-removable;
-       cap-mmc-hw-reset;
-       status = "okay";
-};
-
-&mmc2_8bit_pins {
-       /* Increase drive strength for DDR modes */
-       allwinner,drive = <SUN4I_PINCTRL_40_MA>;
-};
-
-&reg_usb1_vbus {
-       pinctrl-0 = <&usb1_vbus_pin_optimus>;
-       gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
-       status = "okay";
-};
-
 &r_ir {
        status = "okay";
 };