Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm

[cascardo/linux.git] / arch / arm / boot / dts / tegra114.dtsi

diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index 731249f..389e987 100644 (file)
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -1,5 +1,6 @@
 #include <dt-bindings/clock/tegra114-car.h>
 #include <dt-bindings/gpio/tegra-gpio.h>
+#include <dt-bindings/pinctrl/pinctrl-tegra.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
 #include "skeleton.dtsi"
@@ -15,7 +16,113 @@
                serial3 = &uartd;
        };
 
-       gic: interrupt-controller {
+       host1x@50000000 {
+               compatible = "nvidia,tegra114-host1x", "simple-bus";
+               reg = <0x50000000 0x00028000>;
+               interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
+                            <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
+               clocks = <&tegra_car TEGRA114_CLK_HOST1X>;
+               resets = <&tegra_car 28>;
+               reset-names = "host1x";
+
+               #address-cells = <1>;
+               #size-cells = <1>;
+
+               ranges = <0x54000000 0x54000000 0x01000000>;
+
+               gr2d@54140000 {
+                       compatible = "nvidia,tegra114-gr2d", "nvidia,tegra20-gr2d";
+                       reg = <0x54140000 0x00040000>;
+                       interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&tegra_car TEGRA114_CLK_GR2D>;
+                       resets = <&tegra_car 21>;
+                       reset-names = "2d";
+               };
+
+               gr3d@54180000 {
+                       compatible = "nvidia,tegra114-gr3d", "nvidia,tegra20-gr3d";
+                       reg = <0x54180000 0x00040000>;
+                       clocks = <&tegra_car TEGRA114_CLK_GR3D>;
+                       resets = <&tegra_car 24>;
+                       reset-names = "3d";
+               };
+
+               dc@54200000 {
+                       compatible = "nvidia,tegra114-dc", "nvidia,tegra20-dc";
+                       reg = <0x54200000 0x00040000>;
+                       interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&tegra_car TEGRA114_CLK_DISP1>,
+                                <&tegra_car TEGRA114_CLK_PLL_P>;
+                       clock-names = "dc", "parent";
+                       resets = <&tegra_car 27>;
+                       reset-names = "dc";
+
+                       rgb {
+                               status = "disabled";
+                       };
+               };
+
+               dc@54240000 {
+                       compatible = "nvidia,tegra114-dc", "nvidia,tegra20-dc";
+                       reg = <0x54240000 0x00040000>;
+                       interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&tegra_car TEGRA114_CLK_DISP2>,
+                                <&tegra_car TEGRA114_CLK_PLL_P>;
+                       clock-names = "dc", "parent";
+                       resets = <&tegra_car 26>;
+                       reset-names = "dc";
+
+                       rgb {
+                               status = "disabled";
+                       };
+               };
+
+               hdmi@54280000 {
+                       compatible = "nvidia,tegra114-hdmi";
+                       reg = <0x54280000 0x00040000>;
+                       interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&tegra_car TEGRA114_CLK_HDMI>,
+                                <&tegra_car TEGRA114_CLK_PLL_D2_OUT0>;
+                       clock-names = "hdmi", "parent";
+                       resets = <&tegra_car 51>;
+                       reset-names = "hdmi";
+                       status = "disabled";
+               };
+
+               dsi@54300000 {
+                       compatible = "nvidia,tegra114-dsi";
+                       reg = <0x54300000 0x00040000>;
+                       clocks = <&tegra_car TEGRA114_CLK_DSIA>,
+                                <&tegra_car TEGRA114_CLK_DSIALP>,
+                                <&tegra_car TEGRA114_CLK_PLL_D_OUT0>;
+                       clock-names = "dsi", "lp", "parent";
+                       resets = <&tegra_car 48>;
+                       reset-names = "dsi";
+                       nvidia,mipi-calibrate = <&mipi 0x060>; /* DSIA & DSIB pads */
+                       status = "disabled";
+
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
+               dsi@54400000 {
+                       compatible = "nvidia,tegra114-dsi";
+                       reg = <0x54400000 0x00040000>;
+                       clocks = <&tegra_car TEGRA114_CLK_DSIB>,
+                                <&tegra_car TEGRA114_CLK_DSIBLP>,
+                                <&tegra_car TEGRA114_CLK_PLL_D2_OUT0>;
+                       clock-names = "dsi", "lp", "parent";
+                       resets = <&tegra_car 82>;
+                       reset-names = "dsi";
+                       nvidia,mipi-calibrate = <&mipi 0x180>; /* DSIC & DSID pads */
+                       status = "disabled";
+
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+       };
+
+       gic: interrupt-controller@50041000 {
                compatible = "arm,cortex-a15-gic";
                #interrupt-cells = <3>;
                interrupt-controller;
@@ -39,14 +146,14 @@
                clocks = <&tegra_car TEGRA114_CLK_TIMER>;
        };
 
-       tegra_car: clock {
+       tegra_car: clock@60006000 {
                compatible = "nvidia,tegra114-car";
                reg = <0x60006000 0x1000>;
                #clock-cells = <1>;
                #reset-cells = <1>;
        };
 
-       apbdma: dma {
+       apbdma: dma@6000a000 {
                compatible = "nvidia,tegra114-apbdma";
                reg = <0x6000a000 0x1400>;
                interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
@@ -87,12 +194,12 @@
                #dma-cells = <1>;
        };
 
-       ahb: ahb {
+       ahb: ahb@6000c004 {
                compatible = "nvidia,tegra114-ahb", "nvidia,tegra30-ahb";
                reg = <0x6000c004 0x14c>;
        };
 
-       gpio: gpio {
+       gpio: gpio@6000d000 {
                compatible = "nvidia,tegra114-gpio", "nvidia,tegra30-gpio";
                reg = <0x6000d000 0x1000>;
                interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
@@ -109,7 +216,7 @@
                interrupt-controller;
        };
 
-       pinmux: pinmux {
+       pinmux: pinmux@70000868 {
                compatible = "nvidia,tegra114-pinmux";
                reg = <0x70000868 0x148         /* Pad control registers */
                       0x70003000 0x40c>;       /* Mux registers */
@@ -175,7 +282,7 @@
                status = "disabled";
        };
 
-       pwm: pwm {
+       pwm: pwm@7000a000 {
                compatible = "nvidia,tegra114-pwm", "nvidia,tegra20-pwm";
                reg = <0x7000a000 0x100>;
                #pwm-cells = <2>;
@@ -350,14 +457,14 @@
                status = "disabled";
        };
 
-       rtc {
+       rtc@7000e000 {
                compatible = "nvidia,tegra114-rtc", "nvidia,tegra20-rtc";
                reg = <0x7000e000 0x100>;
                interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&tegra_car TEGRA114_CLK_RTC>;
        };
 
-       kbc {
+       kbc@7000e200 {
                compatible = "nvidia,tegra114-kbc";
                reg = <0x7000e200 0x100>;
                interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
@@ -367,14 +474,14 @@
                status = "disabled";
        };
 
-       pmc {
+       pmc@7000e400 {
                compatible = "nvidia,tegra114-pmc";
                reg = <0x7000e400 0x400>;
                clocks = <&tegra_car TEGRA114_CLK_PCLK>, <&clk32k_in>;
                clock-names = "pclk", "clk32k_in";
        };
 
-       iommu {
+       iommu@70019010 {
                compatible = "nvidia,tegra114-smmu", "nvidia,tegra30-smmu";
                reg = <0x70019010 0x02c
                       0x700191f0 0x010
@@ -385,7 +492,7 @@
                nvidia,ahb = <&ahb>;
        };
 
-       ahub {
+       ahub@70080000 {
                compatible = "nvidia,tegra114-ahub";
                reg = <0x70080000 0x200>,
                      <0x70080200 0x100>,
@@ -479,6 +586,13 @@
                };
        };
 
+       mipi: mipi@700e3000 {
+               compatible = "nvidia,tegra114-mipi";
+               reg = <0x700e3000 0x100>;
+               clocks = <&tegra_car TEGRA114_CLK_MIPI_CAL>;
+               #nvidia,mipi-calibrate-cells = <1>;
+       };
+
        sdhci@78000000 {
                compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
                reg = <0x78000000 0x200>;