#include <linux/spi/spi.h>
#include <linux/memblock.h>
#include <linux/of_fdt.h>
+#include <linux/err.h>
+#include <linux/platform_data/ntc_thermistor.h>
#include <asm/mach/arch.h>
#include <asm/hardware/gic.h>
+#include <mach/bitfix-snow.h>
#include <mach/map.h>
+#include <mach/ppmu.h>
+#include <mach/dev.h>
#include <mach/ohci.h>
#include <mach/regs-pmu.h>
#include <mach/sysmmu.h>
#include <mach/regs-pmu.h>
#include <plat/audio.h>
+#include <plat/adc.h> /* for s3c_adc_register and friends */
#include <plat/cpu.h>
#include <plat/dsim.h>
#include <plat/fb.h>
#include <plat/ehci.h>
#include <plat/dp.h>
#include <plat/s3c64xx-spi.h>
-#include <plat/adc.h>
#include <video/platform_lcd.h>
S5P_SROM_BC0 + (ncs * 4));
}
+#ifndef CONFIG_DRM_EXYNOS_FIMD
static struct s3c_fb_pd_win smdk5250_fb_win0 = {
.win_mode = {
.left_margin = 4,
.max_bpp = 32,
.default_bpp = 24,
};
+#endif
-static struct fb_videomode snow_fb_window[] = {
- [0] = { /* Only LCD Connected */
- .left_margin = 0,
- .right_margin = 0,
- .upper_margin = 4,
- .lower_margin = 4,
- .hsync_len = 5,
- .vsync_len = 32,
+/*
+ * - 70250000. / ((1366 + 40 + 40 + 32) * (768 + 10 + 10 + 5))
+ * - 59.93751141159025
+ * - 70500000. / ((1366 + 40 + 40 + 32) * (768 + 10 + 10 + 5))
+ * - 60.150812163944664
+ * - 70500000. / ((1366 + 40 + 40 + 32) * (768 + 10 + 12 + 6))
+ * 59.92411312312578
+ */
+static struct fb_videomode snow_fb_window = {
+ .left_margin = 40,
+ .right_margin = 40,
+ .upper_margin = 10,
+ .lower_margin = 12,
+ .hsync_len = 32,
+ .vsync_len = 6,
.xres = 1366,
.yres = 768,
- },
- [1] = { /* TV & LCD Connected */
- .left_margin = 70,
- .right_margin = 70,
- .upper_margin = 12,
- .lower_margin = 13,
- .hsync_len = 5,
- .vsync_len = 32,
- .xres = 1280,
- .yres = 720,
- },
- [2] = {
- .xres = -1,
- .yres = -1,
- },
+ .refresh = 60,
+ .pixclock = 70500000,
};
static void exynos_fimd_gpio_setup_24bpp(void)
*/
reg = __raw_readl(S3C_VA_SYS + 0x0214);
reg &= ~(1 << 15); /* To save other reset values */
- reg |= (1 << 15);
__raw_writel(reg, S3C_VA_SYS + 0x0214);
}
#ifdef CONFIG_DRM_EXYNOS_FIMD
static struct exynos_drm_fimd_pdata smdk5250_lcd1_pdata = {
- .panel[0].timing = {
- .xres = 1280,
- .yres = 800,
- .hsync_len = 4,
- .left_margin = 0x4,
- .right_margin = 0x4,
- .vsync_len = 4,
- .upper_margin = 4,
- .lower_margin = 4,
- .refresh = 60,
- },
- .panel[1].timing = {
- .xres = 1280,
- .yres = 720,
- .hsync_len = 4,
- .left_margin = 0x4,
- .right_margin = 0x4,
- .vsync_len = 4,
- .upper_margin = 4,
- .lower_margin = 4,
- .refresh = 60,
- },
- .panel[2].timing = {
- .xres = -1,
- .yres = -1,
+ .panel = {
+ .timing = {
+ .xres = 1280,
+ .yres = 800,
+ .hsync_len = 4,
+ .left_margin = 0x4,
+ .right_margin = 0x4,
+ .vsync_len = 4,
+ .upper_margin = 4,
+ .lower_margin = 4,
+ .refresh = 60,
+ },
},
.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
.vidcon1 = VIDCON1_INV_VCLK,
}
};
+static void exynos_wifi_bt_set_power(u32, u32); /* TODO(sleffler) hack */
+
static void lcd_set_power(struct plat_lcd_data *pd,
unsigned int power)
{
/* Wait 10 ms between regulator on and PWM start per spec */
mdelay(10);
}
+ exynos_wifi_bt_set_power(0, power); /* TODO(sleffler) hack */
}
static int smdk5250_match_fb(struct plat_lcd_data *pd, struct fb_info *info)
.phy_type = S5P_USB_PHY_DRD,
.phy_init = s5p_usb_phy_init,
.phy_exit = s5p_usb_phy_exit,
+ .phyclk_switch = exynos5_dwc_phyclk_switch,
+ .use_ext_clk = s5p_usb_phy_use_ext_clk,
};
struct exynos_gpio_cfg {
[1] = "i2sclk",
};
-static struct video_info smdk5250_dp_config = {
+static struct video_info ptn3460_dp_config = {
.name = "eDP-LVDS NXP PTN3460",
.h_sync_polarity = 0,
.lane_count = LANE_COUNT2,
};
-static void get_dp_bridge_gpios(int *pd_n_gpio, int *rst_n_gpio)
-{
- struct device_node *np;
-
- np = of_find_compatible_node(NULL, NULL, "nxp,ptn3460");
- *pd_n_gpio = np ? of_get_named_gpio(np, "pd_n_gpio", 0) : -1;
- *rst_n_gpio = np ? of_get_named_gpio(np, "rst_n_gpio", 0) : -1;
-}
-
-static void dp_phy_init(void)
-{
- int pd_n_gpio, rst_n_gpio;
-
- get_dp_bridge_gpios(&pd_n_gpio, &rst_n_gpio);
- if (pd_n_gpio >= 0)
- gpio_set_value(pd_n_gpio, 1);
+static struct video_info ps8622_dp_config = {
+ .name = "eDP-LVDS Parade PS8622",
- if (rst_n_gpio >= 0) {
- gpio_set_value(rst_n_gpio, 0);
- udelay(10);
- gpio_set_value(rst_n_gpio, 1);
- }
+ .h_sync_polarity = 0,
+ .v_sync_polarity = 0,
+ .interlaced = 0,
- /* This really sucks, but we can't trust HPD from the bridge */
- if (pd_n_gpio >= 0)
- msleep(90);
+ .color_space = COLOR_RGB,
+ .dynamic_range = VESA,
+ .ycbcr_coeff = COLOR_YCBCR601,
+ .color_depth = COLOR_8,
- s5p_dp_phy_init();
-}
+ .link_rate = LINK_RATE_2_70GBPS,
+ .lane_count = LANE_COUNT1,
+};
static struct exynos_dp_platdata smdk5250_dp_data = {
- .video_info = &smdk5250_dp_config,
- .training_type = SW_LINK_TRAINING,
- .phy_init = dp_phy_init,
- .phy_exit = s5p_dp_phy_exit,
+ .video_info = &ptn3460_dp_config,
+ .training_type = SW_LINK_TRAINING,
+ .hpd_gpio = -ENODEV,
+ .force_connected = true,
+ .phy_init = s5p_dp_phy_init,
+ .phy_exit = s5p_dp_phy_exit,
};
#define S5P_PMU_DEBUG S5P_PMUREG(0x0A00)
},
};
-static struct resource exynos5_adc_resource[] = {
- [0] = DEFINE_RES_MEM(EXYNOS5_PA_ADC, SZ_256),
- [1] = DEFINE_RES_IRQ(EXYNOS5_IRQ_ADC0),
+/*
+ * Hack to do power-on sequence after the 32khz SLP_CLK is
+ * running as doing this entirely in the DT is problematic.
+ * We attach an auxdata record to dw_mmc2 with a set_power
+ * method that frobs the regulators. This work is not board
+ * specific but must be done before the device is recognized
+ * so cannot go in the driver.
+ */
+static bool enable_mwi87xx(void)
+{
+ struct regulator *wifi_en, *wifi_rst;
+ bool ok;
+
+ wifi_en = regulator_get(NULL, "wifi-en");
+ wifi_rst = regulator_get(NULL, "wifi-rst-l");
+ ok = !IS_ERR(wifi_en) && !IS_ERR(wifi_rst);
+ if (ok) {
+ /*
+ * This assumes SLP_CLK is enabled and stable by the
+ * time we get here. Also any delay required between
+ * RESETn and PDn should be set in startup-delay-us
+ * in the DT.
+ */
+ regulator_enable(wifi_rst);
+ regulator_enable(wifi_en);
+ }
+
+ if (!IS_ERR(wifi_rst))
+ regulator_put(wifi_rst);
+ if (!IS_ERR(wifi_en))
+ regulator_put(wifi_en);
+ return ok;
+}
+
+static void exynos_wifi_bt_set_power(u32 slot_id, u32 volt)
+{
+ if (volt == 0 || (!of_machine_is_compatible("google,snow") &&
+ !of_machine_is_compatible("google,spring") &&
+ !of_machine_is_compatible("google,daisy")))
+ return;
+ if (!enable_mwi87xx())
+ pr_err("%s: problem enabling WiFi+BT\n", __func__);
+ /* NB: bt-reset-l is tied to wifi-rst-l so BT should be ready too */
+}
+
+
+/* NTC Thermistor. Attached to S3C-ADC in some Samsung SoC Devices */
+struct s3c_adc_client *ntc_adc_clients[4];
+struct mutex ntc_adc_locks[] = {
+ __MUTEX_INITIALIZER(ntc_adc_locks[0]),
+ __MUTEX_INITIALIZER(ntc_adc_locks[1]),
+ __MUTEX_INITIALIZER(ntc_adc_locks[2]),
+ __MUTEX_INITIALIZER(ntc_adc_locks[3]),
};
-struct platform_device exynos5_device_adc = {
- .name = "samsung-adc-v4",
- .id = -1,
- .num_resources = ARRAY_SIZE(exynos5_adc_resource),
- .resource = exynos5_adc_resource,
+static int __init s3c_adc_ntc_init(struct platform_device *pdev)
+{
+ struct s3c_adc_client *ntc_adc_client;
+
+ ntc_adc_client = s3c_adc_register(pdev, NULL, NULL, 0);
+ if (IS_ERR(ntc_adc_client))
+ return PTR_ERR(ntc_adc_client);
+
+ ntc_adc_clients[pdev->id] = ntc_adc_client;
+
+ return 0;
+}
+
+/*
+ * read_thermistor_uV: is a call back from ntc_thermistor driver.
+ * returns the temperature of the thermistor in celsius
+ */
+static int read_thermistor_uV(struct platform_device *pdev)
+{
+ static unsigned int ntc_adc_ports[] = {3, 4, 5, 6};
+ s64 converted;
+ unsigned int port = ntc_adc_ports[pdev->id];
+ struct s3c_adc_client *client = ntc_adc_clients[pdev->id];
+ struct ntc_thermistor_platform_data *pdata = pdev->dev.platform_data;
+ struct mutex *lock = ntc_adc_locks + pdev->id;
+ int ret;
+
+ /* Arrays are sized; make sure we haven't blown over */
+ BUG_ON(pdev->id >= ARRAY_SIZE(ntc_adc_locks));
+
+ /*
+ * s3c_adc_read() assumes two processes aren't using the same client
+ * at the same time (yes, it's a bad design), so grab a per-client
+ * mutex to ensure this is OK.
+ */
+ mutex_lock(lock);
+ ret = s3c_adc_read(client, port);
+ mutex_unlock(lock);
+
+ if (ret < 0) {
+ dev_warn(&pdev->dev, "Thermistor read err: 0x%08x\n", ret);
+ return ret;
+ }
+
+ converted = pdata->pullup_uV * (s64) ret;
+ converted >>= 12;
+
+ return (int) converted;
+}
+
+static struct ntc_thermistor_platform_data ntc_adc_pdata = {
+ .read_uV = read_thermistor_uV,
+ .pullup_uV = 1800000, /* voltage of vdd for ADC */
+ .pullup_ohm = 47000,
+ .pulldown_ohm = 0,
+ .connect = NTC_CONNECTED_GROUND,
+};
+
+struct platform_device s3c_device_adc_ntc_thermistor0 = {
+ .name = "ncp15wb473",
+ .id = 0,
+ .dev = {
+ .platform_data = &ntc_adc_pdata,
+ },
+};
+
+struct platform_device s3c_device_adc_ntc_thermistor1 = {
+ .name = "ncp15wb473",
+ .id = 1,
+ .dev = {
+ .platform_data = &ntc_adc_pdata,
+ },
+};
+
+struct platform_device s3c_device_adc_ntc_thermistor2 = {
+ .name = "ncp15wb473",
+ .id = 2,
+ .dev = {
+ .platform_data = &ntc_adc_pdata,
+ },
+};
+
+struct platform_device s3c_device_adc_ntc_thermistor3 = {
+ .name = "ncp15wb473",
+ .id = 3,
+ .dev = {
+ .platform_data = &ntc_adc_pdata,
+ },
};
/*
{},
};
+#ifdef CONFIG_BUSFREQ_OPP
+/* BUSFREQ to control memory/bus*/
+static struct device_domain busfreq;
+
+static struct platform_device exynos5_busfreq = {
+ .id = -1,
+ .name = "exynos-busfreq",
+};
+#endif
+
static struct platform_device *smdk5250_devices[] __initdata = {
- &exynos5_device_adc,
&smdk5250_lcd, /* for platform_lcd device */
&exynos_device_md0, /* for media device framework */
&exynos_device_md1, /* for media device framework */
#ifdef CONFIG_DRM_EXYNOS_HDMI
&exynos_drm_hdmi_device,
#endif
+#ifdef CONFIG_BUSFREQ_OPP
+ &exynos5_busfreq,
+#endif
+};
+
+static struct platform_device *thermistor_devices[] __initdata = {
+ &s3c_device_adc_ntc_thermistor0,
+ &s3c_device_adc_ntc_thermistor1,
+ &s3c_device_adc_ntc_thermistor2,
+ &s3c_device_adc_ntc_thermistor3,
};
static struct regulator_consumer_supply dummy_supplies[] = {
init_consistent_dma_size(SZ_64M);
exynos5_ramoops_reserve();
+ bitfix_reserve();
}
static void s5p_tv_setup(void)
static void __init exynos5250_dt_machine_init(void)
{
struct device_node *srom_np, *np;
- int ret,i;
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
}
/*
- * Request lcd_bl_en GPIO for smdk5250_bl_notify().
- * TODO: Fix this so we are not at risk of requesting the GPIO
- * multiple times, this should be done with device tree, and
- * likely integrated into the plat-samsung/dev-backlight.c init.
+ * Set the backlight on LCD_PWM pin only for boards not using the
+ * Parade eDP bridge which has an internal PWN for the backlight.
*/
- gpio_request_one(EXYNOS5_GPX3(0), GPIOF_OUT_INIT_LOW, "lcd_bl_en");
+ if (!of_find_compatible_node(NULL, NULL, "parade,ps8622")) {
+ if (of_machine_is_compatible("google,snow")) {
+ smdk5250_bl_data.max_brightness = 2800;
+ smdk5250_bl_data.dft_brightness = 2800;
+ }
+
+ /*
+ * Request lcd_bl_en GPIO for smdk5250_bl_notify().
+ * TODO: Fix this so we are not at risk of requesting the GPIO
+ * multiple times, this should be done with device tree, and
+ * likely integrated into the plat-samsung/dev-backlight.c init.
+ */
+ gpio_request_one(EXYNOS5_GPX3(0), GPIOF_OUT_INIT_HIGH,
+ "lcd_bl_en");
- samsung_bl_set(&smdk5250_bl_gpio_info, &smdk5250_bl_data);
+ samsung_bl_set(&smdk5250_bl_gpio_info, &smdk5250_bl_data);
+ }
/*
* HACK ALERT! TODO: FIXME!
if (of_machine_is_compatible("google,daisy")) {
#ifdef CONFIG_DRM_EXYNOS_FIMD
- smdk5250_lcd1_pdata.panel[0].timing.xres = 1366;
- smdk5250_lcd1_pdata.panel[0].timing.yres = 768;
- smdk5250_lcd1_pdata.panel[1].timing.xres = 1280;
- smdk5250_lcd1_pdata.panel[1].timing.yres = 720;
- smdk5250_lcd1_pdata.panel[2].timing.xres = -1;
- smdk5250_lcd1_pdata.panel[2].timing.yres = -1;
+ smdk5250_lcd1_pdata.panel.timing.xres = 1366;
+ smdk5250_lcd1_pdata.panel.timing.yres = 768;
smdk5250_lcd1_pdata.panel_type = MIPI_LCD;
#else
smdk5250_fb_win0.win_mode.xres = 1366;
#endif
dsim_lcd_info.lcd_size.width = 1366;
dsim_lcd_info.lcd_size.height = 768;
- } else if (of_machine_is_compatible("google,snow")) {
- int pd_n_gpio, rst_n_gpio;
+ } else if ((of_machine_is_compatible("google,snow")) ||
+ (of_machine_is_compatible("google,spring"))) {
#ifdef CONFIG_DRM_EXYNOS_FIMD
- for (i = 0;i < ARRAY_SIZE(snow_fb_window);i++)
- smdk5250_lcd1_pdata.panel[i].timing = snow_fb_window[i];
+ smdk5250_lcd1_pdata.panel.timing = snow_fb_window;
smdk5250_lcd1_pdata.panel_type = DP_LCD;
- smdk5250_lcd1_pdata.clock_rate = 267 * 1000 * 1000;
smdk5250_lcd1_pdata.vidcon1 = 0;
+ smdk5250_lcd1_pdata.clock_rate =
+ smdk5250_lcd1_pdata.panel.timing.pixclock;
#endif
+ }
- get_dp_bridge_gpios(&pd_n_gpio, &rst_n_gpio);
- if (pd_n_gpio >= 0) {
- ret = gpio_request_one(pd_n_gpio, GPIOF_OUT_INIT_HIGH,
- "DP_PD_N");
- WARN_ON(ret);
- }
- if (rst_n_gpio >= 0) {
- ret = gpio_request_one(rst_n_gpio, GPIOF_OUT_INIT_HIGH,
- "DP_RST_N");
- WARN_ON(ret);
+ /* put the DP output configuration matching the eDP-LVDS bridge */
+ if (of_find_compatible_node(NULL, NULL, "nxp,ptn3460")) {
+ smdk5250_dp_data.video_info = &ptn3460_dp_config;
+ } else {
+ struct device_node *node =
+ of_find_compatible_node(NULL, NULL, "parade,ps8622");
+ if (node) {
+ smdk5250_dp_data.video_info = &ps8622_dp_config;
+ smdk5250_dp_data.hpd_gpio =
+ of_get_named_gpio(node, "hpd-gpio", 0);
}
}
#endif
s5p_tv_setup();
- /* Enable power to ADC */
- __raw_writel(0x1, S5P_ADC_PHY_CONTROL);
+ np = of_find_compatible_node(NULL, NULL, "samsung,exynos5-adc");
+ if (np && of_device_is_available(np)) {
+ /* Enable power to ADC */
+ __raw_writel(0x1, S5P_ADC_PHY_CONTROL);
+
+ s3c_adc_ntc_init(&s3c_device_adc_ntc_thermistor0);
+ s3c_adc_ntc_init(&s3c_device_adc_ntc_thermistor1);
+ s3c_adc_ntc_init(&s3c_device_adc_ntc_thermistor2);
+ s3c_adc_ntc_init(&s3c_device_adc_ntc_thermistor3);
+ platform_add_devices(thermistor_devices,
+ ARRAY_SIZE(thermistor_devices));
+ }
+
+#ifdef CONFIG_BUSFREQ_OPP
+ dev_add(&busfreq, &exynos5_busfreq.dev);
+ ppmu_init(&exynos_ppmu[PPMU_CPU], &exynos5_busfreq.dev);
+ ppmu_init(&exynos_ppmu[PPMU_DDR_C], &exynos5_busfreq.dev);
+ ppmu_init(&exynos_ppmu[PPMU_DDR_R1], &exynos5_busfreq.dev);
+ ppmu_init(&exynos_ppmu[PPMU_DDR_L], &exynos5_busfreq.dev);
+ ppmu_init(&exynos_ppmu[PPMU_RIGHT0_BUS], &exynos5_busfreq.dev);
+#endif
platform_add_devices(smdk5250_devices, ARRAY_SIZE(smdk5250_devices));
out:
of_node_put(srom_np);