#include <asm/mach/arch.h>
#include <asm/hardware/gic.h>
+#include <mach/bitfix-snow.h>
#include <mach/map.h>
#include <mach/ppmu.h>
#include <mach/dev.h>
* - 70500000. / ((1366 + 40 + 40 + 32) * (768 + 10 + 12 + 6))
* 59.92411312312578
*/
-static struct fb_videomode snow_fb_window[] = {
- {
+static struct fb_videomode snow_fb_window = {
.left_margin = 40,
.right_margin = 40,
.upper_margin = 10,
.vsync_len = 6,
.xres = 1366,
.yres = 768,
- }, {
- .xres = -1,
- .yres = -1,
- },
+ .refresh = 60,
+ .pixclock = 70500000,
};
static void exynos_fimd_gpio_setup_24bpp(void)
#ifdef CONFIG_DRM_EXYNOS_FIMD
static struct exynos_drm_fimd_pdata smdk5250_lcd1_pdata = {
- .panel[0].timing = {
- .xres = 1280,
- .yres = 800,
- .hsync_len = 4,
- .left_margin = 0x4,
- .right_margin = 0x4,
- .vsync_len = 4,
- .upper_margin = 4,
- .lower_margin = 4,
- .refresh = 60,
- },
- .panel[1].timing = {
- .xres = 1280,
- .yres = 720,
- .hsync_len = 4,
- .left_margin = 0x4,
- .right_margin = 0x4,
- .vsync_len = 4,
- .upper_margin = 4,
- .lower_margin = 4,
- .refresh = 60,
- },
- .panel[2].timing = {
- .xres = -1,
- .yres = -1,
+ .panel = {
+ .timing = {
+ .xres = 1280,
+ .yres = 800,
+ .hsync_len = 4,
+ .left_margin = 0x4,
+ .right_margin = 0x4,
+ .vsync_len = 4,
+ .upper_margin = 4,
+ .lower_margin = 4,
+ .refresh = 60,
+ },
},
.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
.vidcon1 = VIDCON1_INV_VCLK,
.phy_init = s5p_usb_phy_init,
.phy_exit = s5p_usb_phy_exit,
.phyclk_switch = exynos5_dwc_phyclk_switch,
+ .use_ext_clk = s5p_usb_phy_use_ext_clk,
};
struct exynos_gpio_cfg {
};
static struct exynos_dp_platdata smdk5250_dp_data = {
- .video_info = &ptn3460_dp_config,
- .training_type = SW_LINK_TRAINING,
- .hpd_gpio = -ENODEV,
- .phy_init = s5p_dp_phy_init,
- .phy_exit = s5p_dp_phy_exit,
+ .video_info = &ptn3460_dp_config,
+ .training_type = SW_LINK_TRAINING,
+ .hpd_gpio = -ENODEV,
+ .force_connected = true,
+ .phy_init = s5p_dp_phy_init,
+ .phy_exit = s5p_dp_phy_exit,
};
#define S5P_PMU_DEBUG S5P_PMUREG(0x0A00)
#ifdef CONFIG_DRM_EXYNOS_HDMI
&exynos_drm_hdmi_device,
#endif
+#ifdef CONFIG_BUSFREQ_OPP
+ &exynos5_busfreq,
+#endif
+};
+
+static struct platform_device *thermistor_devices[] __initdata = {
&s3c_device_adc_ntc_thermistor0,
&s3c_device_adc_ntc_thermistor1,
&s3c_device_adc_ntc_thermistor2,
&s3c_device_adc_ntc_thermistor3,
-#ifdef CONFIG_BUSFREQ_OPP
- &exynos5_busfreq,
-#endif
};
static struct regulator_consumer_supply dummy_supplies[] = {
init_consistent_dma_size(SZ_64M);
exynos5_ramoops_reserve();
+ bitfix_reserve();
}
static void s5p_tv_setup(void)
static void __init exynos5250_dt_machine_init(void)
{
struct device_node *srom_np, *np;
- int i;
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
}
/*
- * Request lcd_bl_en GPIO for smdk5250_bl_notify().
- * TODO: Fix this so we are not at risk of requesting the GPIO
- * multiple times, this should be done with device tree, and
- * likely integrated into the plat-samsung/dev-backlight.c init.
+ * Set the backlight on LCD_PWM pin only for boards not using the
+ * Parade eDP bridge which has an internal PWN for the backlight.
*/
- gpio_request_one(EXYNOS5_GPX3(0), GPIOF_OUT_INIT_HIGH, "lcd_bl_en");
+ if (!of_find_compatible_node(NULL, NULL, "parade,ps8622")) {
+ if (of_machine_is_compatible("google,snow")) {
+ smdk5250_bl_data.max_brightness = 2800;
+ smdk5250_bl_data.dft_brightness = 2800;
+ }
- if (of_machine_is_compatible("google,snow")) {
- smdk5250_bl_data.max_brightness = 2800;
- smdk5250_bl_data.dft_brightness = 2800;
+ /*
+ * Request lcd_bl_en GPIO for smdk5250_bl_notify().
+ * TODO: Fix this so we are not at risk of requesting the GPIO
+ * multiple times, this should be done with device tree, and
+ * likely integrated into the plat-samsung/dev-backlight.c init.
+ */
+ gpio_request_one(EXYNOS5_GPX3(0), GPIOF_OUT_INIT_HIGH,
+ "lcd_bl_en");
+
+ samsung_bl_set(&smdk5250_bl_gpio_info, &smdk5250_bl_data);
}
- samsung_bl_set(&smdk5250_bl_gpio_info, &smdk5250_bl_data);
/*
* HACK ALERT! TODO: FIXME!
if (of_machine_is_compatible("google,daisy")) {
#ifdef CONFIG_DRM_EXYNOS_FIMD
- smdk5250_lcd1_pdata.panel[0].timing.xres = 1366;
- smdk5250_lcd1_pdata.panel[0].timing.yres = 768;
- smdk5250_lcd1_pdata.panel[1].timing.xres = 1280;
- smdk5250_lcd1_pdata.panel[1].timing.yres = 720;
- smdk5250_lcd1_pdata.panel[2].timing.xres = -1;
- smdk5250_lcd1_pdata.panel[2].timing.yres = -1;
+ smdk5250_lcd1_pdata.panel.timing.xres = 1366;
+ smdk5250_lcd1_pdata.panel.timing.yres = 768;
smdk5250_lcd1_pdata.panel_type = MIPI_LCD;
#else
smdk5250_fb_win0.win_mode.xres = 1366;
} else if ((of_machine_is_compatible("google,snow")) ||
(of_machine_is_compatible("google,spring"))) {
#ifdef CONFIG_DRM_EXYNOS_FIMD
- for (i = 0;i < ARRAY_SIZE(snow_fb_window);i++)
- smdk5250_lcd1_pdata.panel[i].timing = snow_fb_window[i];
+ smdk5250_lcd1_pdata.panel.timing = snow_fb_window;
smdk5250_lcd1_pdata.panel_type = DP_LCD;
- smdk5250_lcd1_pdata.clock_rate = 70500000;
smdk5250_lcd1_pdata.vidcon1 = 0;
+ smdk5250_lcd1_pdata.clock_rate =
+ smdk5250_lcd1_pdata.panel.timing.pixclock;
#endif
}
exynos5250_auxdata_lookup, NULL);
#ifdef CONFIG_DRM_EXYNOS_FIMD
- if ((of_machine_is_compatible("google,snow")) ||
- (of_machine_is_compatible("google,spring")))
+ if (of_machine_is_compatible("google,snow"))
exynos_dp_gpio_setup_24bpp();
else
exynos_fimd_gpio_setup_24bpp();
#endif
s5p_tv_setup();
- /* Enable power to ADC */
- __raw_writel(0x1, S5P_ADC_PHY_CONTROL);
+ np = of_find_compatible_node(NULL, NULL, "samsung,exynos5-adc");
+ if (np && of_device_is_available(np)) {
+ /* Enable power to ADC */
+ __raw_writel(0x1, S5P_ADC_PHY_CONTROL);
- s3c_adc_ntc_init(&s3c_device_adc_ntc_thermistor0);
- s3c_adc_ntc_init(&s3c_device_adc_ntc_thermistor1);
- s3c_adc_ntc_init(&s3c_device_adc_ntc_thermistor2);
- s3c_adc_ntc_init(&s3c_device_adc_ntc_thermistor3);
+ s3c_adc_ntc_init(&s3c_device_adc_ntc_thermistor0);
+ s3c_adc_ntc_init(&s3c_device_adc_ntc_thermistor1);
+ s3c_adc_ntc_init(&s3c_device_adc_ntc_thermistor2);
+ s3c_adc_ntc_init(&s3c_device_adc_ntc_thermistor3);
+
+ platform_add_devices(thermistor_devices,
+ ARRAY_SIZE(thermistor_devices));
+ }
#ifdef CONFIG_BUSFREQ_OPP
dev_add(&busfreq, &exynos5_busfreq.dev);