/*
- * linux/arch/arm/mach-omap1/id.c
+ * linux/arch/arm/mach-omap1/serial.c
*
- * OMAP1 CPU identification code
+ * OMAP1 serial support.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
-#include <linux/config.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
+#include <linux/irq.h>
#include <linux/delay.h>
#include <linux/serial.h>
#include <linux/tty.h>
#include <asm/arch/pm.h>
#endif
-static struct clk * uart1_ck = NULL;
-static struct clk * uart2_ck = NULL;
-static struct clk * uart3_ck = NULL;
+static struct clk * uart1_ck;
+static struct clk * uart2_ck;
+static struct clk * uart3_ck;
static inline unsigned int omap_serial_in(struct plat_serial8250_port *up,
int offset)
omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */
omap_serial_outp(p, UART_OMAP_MDR1, 0x00); /* enable UART */
- if (!cpu_is_omap1510()) {
+ if (!cpu_is_omap15xx()) {
omap_serial_outp(p, UART_OMAP_SYSC, 0x01);
while (!(omap_serial_in(p, UART_OMAP_SYSC) & 0x01));
}
serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2;
}
- if (cpu_is_omap1510()) {
+ if (cpu_is_omap15xx()) {
serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16;
serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16;
serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16;
printk("Could not get uart1_ck\n");
else {
clk_enable(uart1_ck);
- if (cpu_is_omap1510())
+ if (cpu_is_omap15xx())
clk_set_rate(uart1_ck, 12000000);
}
- if (cpu_is_omap1510()) {
+ if (cpu_is_omap15xx()) {
omap_cfg_reg(UART1_TX);
omap_cfg_reg(UART1_RTS);
if (machine_is_omap_innovator()) {
printk("Could not get uart2_ck\n");
else {
clk_enable(uart2_ck);
- if (cpu_is_omap1510())
+ if (cpu_is_omap15xx())
clk_set_rate(uart2_ck, 12000000);
else
clk_set_rate(uart2_ck, 48000000);
}
- if (cpu_is_omap1510()) {
+ if (cpu_is_omap15xx()) {
omap_cfg_reg(UART2_TX);
omap_cfg_reg(UART2_RTS);
if (machine_is_omap_innovator()) {
printk("Could not get uart3_ck\n");
else {
clk_enable(uart3_ck);
- if (cpu_is_omap1510())
+ if (cpu_is_omap15xx())
clk_set_rate(uart3_ck, 12000000);
}
- if (cpu_is_omap1510()) {
+ if (cpu_is_omap15xx()) {
omap_cfg_reg(UART3_TX);
omap_cfg_reg(UART3_RX);
}
#ifdef CONFIG_OMAP_SERIAL_WAKE
-static irqreturn_t omap_serial_wake_interrupt(int irq, void *dev_id,
- struct pt_regs *regs)
+static irqreturn_t omap_serial_wake_interrupt(int irq, void *dev_id)
{
/* Need to do something with serial port right after wake-up? */
return IRQ_HANDLED;
}
omap_set_gpio_direction(gpio_nr, 1);
ret = request_irq(OMAP_GPIO_IRQ(gpio_nr), &omap_serial_wake_interrupt,
- SA_TRIGGER_RISING, "serial wakeup", NULL);
+ IRQF_TRIGGER_RISING, "serial wakeup", NULL);
if (ret) {
omap_free_gpio(gpio_nr);
printk(KERN_ERR "No interrupt for UART wake GPIO: %i\n",