arm64: tegra: Add ACONNECT bus node for Tegra210
[cascardo/linux.git] / arch / arm64 / boot / dts / nvidia / tegra210.dtsi
index 76fe31f..cefae3b 100644 (file)
                reg = <0x0 0x7000e400 0x0 0x400>;
                clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>;
                clock-names = "pclk", "clk32k_in";
+
+               powergates {
+                       pd_audio: aud {
+                               clocks = <&tegra_car TEGRA210_CLK_APE>,
+                                        <&tegra_car TEGRA210_CLK_APB2APE>;
+                               resets = <&tegra_car 198>;
+                               #power-domain-cells = <0>;
+                       };
+               };
        };
 
        fuse@7000f800 {
                status = "disabled";
        };
 
+       usb@70090000 {
+               compatible = "nvidia,tegra210-xusb";
+               reg = <0x0 0x70090000 0x0 0x8000>,
+                     <0x0 0x70098000 0x0 0x1000>,
+                     <0x0 0x70099000 0x0 0x1000>;
+               reg-names = "hcd", "fpci", "ipfs";
+
+               interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+
+               clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>,
+                        <&tegra_car TEGRA210_CLK_XUSB_HOST_SRC>,
+                        <&tegra_car TEGRA210_CLK_XUSB_FALCON_SRC>,
+                        <&tegra_car TEGRA210_CLK_XUSB_SS>,
+                        <&tegra_car TEGRA210_CLK_XUSB_SS_DIV2>,
+                        <&tegra_car TEGRA210_CLK_XUSB_SS_SRC>,
+                        <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>,
+                        <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>,
+                        <&tegra_car TEGRA210_CLK_PLL_U_480M>,
+                        <&tegra_car TEGRA210_CLK_CLK_M>,
+                        <&tegra_car TEGRA210_CLK_PLL_E>;
+               clock-names = "xusb_host", "xusb_host_src",
+                             "xusb_falcon_src", "xusb_ss",
+                             "xusb_ss_div2", "xusb_ss_src",
+                             "xusb_hs_src", "xusb_fs_src",
+                             "pll_u_480m", "clk_m", "pll_e";
+               resets = <&tegra_car 89>, <&tegra_car 156>,
+                        <&tegra_car 143>;
+               reset-names = "xusb_host", "xusb_ss", "xusb_src";
+
+               nvidia,xusb-padctl = <&padctl>;
+
+               status = "disabled";
+       };
+
+       padctl: padctl@7009f000 {
+               compatible = "nvidia,tegra210-xusb-padctl";
+               reg = <0x0 0x7009f000 0x0 0x1000>;
+               resets = <&tegra_car 142>;
+               reset-names = "padctl";
+
+               status = "disabled";
+
+               pads {
+                       usb2 {
+                               clocks = <&tegra_car TEGRA210_CLK_USB2_TRK>;
+                               clock-names = "trk";
+                               status = "disabled";
+
+                               lanes {
+                                       usb2-0 {
+                                               status = "disabled";
+                                               #phy-cells = <0>;
+                                       };
+
+                                       usb2-1 {
+                                               status = "disabled";
+                                               #phy-cells = <0>;
+                                       };
+
+                                       usb2-2 {
+                                               status = "disabled";
+                                               #phy-cells = <0>;
+                                       };
+
+                                       usb2-3 {
+                                               status = "disabled";
+                                               #phy-cells = <0>;
+                                       };
+                               };
+                       };
+
+                       hsic {
+                               clocks = <&tegra_car TEGRA210_CLK_HSIC_TRK>;
+                               clock-names = "trk";
+                               status = "disabled";
+
+                               lanes {
+                                       hsic-0 {
+                                               status = "disabled";
+                                               #phy-cells = <0>;
+                                       };
+
+                                       hsic-1 {
+                                               status = "disabled";
+                                               #phy-cells = <0>;
+                                       };
+                               };
+                       };
+
+                       pcie {
+                               clocks = <&tegra_car TEGRA210_CLK_PLL_E>;
+                               clock-names = "pll";
+                               resets = <&tegra_car 205>;
+                               reset-names = "phy";
+                               status = "disabled";
+
+                               lanes {
+                                       pcie-0 {
+                                               status = "disabled";
+                                               #phy-cells = <0>;
+                                       };
+
+                                       pcie-1 {
+                                               status = "disabled";
+                                               #phy-cells = <0>;
+                                       };
+
+                                       pcie-2 {
+                                               status = "disabled";
+                                               #phy-cells = <0>;
+                                       };
+
+                                       pcie-3 {
+                                               status = "disabled";
+                                               #phy-cells = <0>;
+                                       };
+
+                                       pcie-4 {
+                                               status = "disabled";
+                                               #phy-cells = <0>;
+                                       };
+
+                                       pcie-5 {
+                                               status = "disabled";
+                                               #phy-cells = <0>;
+                                       };
+
+                                       pcie-6 {
+                                               status = "disabled";
+                                               #phy-cells = <0>;
+                                       };
+                               };
+                       };
+
+                       sata {
+                               clocks = <&tegra_car TEGRA210_CLK_PLL_E>;
+                               clock-names = "pll";
+                               resets = <&tegra_car 204>;
+                               reset-names = "phy";
+                               status = "disabled";
+
+                               lanes {
+                                       sata-0 {
+                                               status = "disabled";
+                                               #phy-cells = <0>;
+                                       };
+                               };
+                       };
+               };
+
+               ports {
+                       usb2-0 {
+                               status = "disabled";
+                       };
+
+                       usb2-1 {
+                               status = "disabled";
+                       };
+
+                       usb2-2 {
+                               status = "disabled";
+                       };
+
+                       usb2-3 {
+                               status = "disabled";
+                       };
+
+                       hsic-0 {
+                               status = "disabled";
+                       };
+
+                       usb3-0 {
+                               status = "disabled";
+                       };
+
+                       usb3-1 {
+                               status = "disabled";
+                       };
+
+                       usb3-2 {
+                               status = "disabled";
+                       };
+
+                       usb3-3 {
+                               status = "disabled";
+                       };
+               };
+       };
+
        sdhci@700b0000 {
                compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
                reg = <0x0 0x700b0000 0x0 0x200>;
                #nvidia,mipi-calibrate-cells = <1>;
        };
 
+       aconnect@702c0000 {
+               compatible = "nvidia,tegra210-aconnect";
+               clocks = <&tegra_car TEGRA210_CLK_APE>,
+                        <&tegra_car TEGRA210_CLK_APB2APE>;
+               clock-names = "ape", "apb2ape";
+               power-domains = <&pd_audio>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges = <0x702c0000 0x0 0x702c0000 0x00040000>;
+               status = "disabled";
+       };
+
        spi@70410000 {
                compatible = "nvidia,tegra210-qspi";
                reg = <0x0 0x70410000 0x0 0x1000>;