ia64: define __smp_xxx

[cascardo/linux.git] / arch / ia64 / include / asm / barrier.h

diff --git a/arch/ia64/include/asm/barrier.h b/arch/ia64/include/asm/barrier.h
index df896a1..588f161 100644 (file)
--- a/arch/ia64/include/asm/barrier.h
+++ b/arch/ia64/include/asm/barrier.h
@@ -42,34 +42,24 @@
 #define dma_rmb()      mb()
 #define dma_wmb()      mb()
 
-#ifdef CONFIG_SMP
-# define smp_mb()      mb()
-#else
-# define smp_mb()      barrier()
-#endif
+# define __smp_mb()    mb()
 
-#define smp_rmb()      smp_mb()
-#define smp_wmb()      smp_mb()
-
-#define read_barrier_depends()         do { } while (0)
-#define smp_read_barrier_depends()     do { } while (0)
-
-#define smp_mb__before_atomic()        barrier()
-#define smp_mb__after_atomic() barrier()
+#define __smp_mb__before_atomic()      barrier()
+#define __smp_mb__after_atomic()       barrier()
 
 /*
  * IA64 GCC turns volatile stores into st.rel and volatile loads into ld.acq no
  * need for asm trickery!
  */
 
-#define smp_store_release(p, v)                                                \
+#define __smp_store_release(p, v)                                              \
 do {                                                                   \
        compiletime_assert_atomic_type(*p);                             \
        barrier();                                                      \
        WRITE_ONCE(*p, v);                                              \
 } while (0)
 
-#define smp_load_acquire(p)                                            \
+#define __smp_load_acquire(p)                                          \
 ({                                                                     \
        typeof(*p) ___p1 = READ_ONCE(*p);                               \
        compiletime_assert_atomic_type(*p);                             \
@@ -77,12 +67,12 @@ do {                                                                        \
        ___p1;                                                          \
 })
 
-#define smp_store_mb(var, value)       do { WRITE_ONCE(var, value); mb(); } while (0)
-
 /*
  * The group barrier in front of the rsm & ssm are necessary to ensure
  * that none of the previous instructions in the same group are
  * affected by the rsm/ssm.
  */
 
+#include <asm-generic/barrier.h>
+
 #endif /* _ASM_IA64_BARRIER_H */