Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net

[cascardo/linux.git] / arch / mips / boot / dts / brcm / bcm7425.dtsi

diff --git a/arch/mips/boot/dts/brcm/bcm7425.dtsi b/arch/mips/boot/dts/brcm/bcm7425.dtsi
index c1c15ed..2488d2f 100644 (file)
--- a/arch/mips/boot/dts/brcm/bcm7425.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7425.dtsi
@@ -26,7 +26,7 @@
                uart0 = &uart0;
        };
 
-       cpu_intc: cpu_intc {
+       cpu_intc: interrupt-controller {
                #address-cells = <0>;
                compatible = "mti,cpu-interrupt-controller";
 
@@ -40,6 +40,12 @@
                        #clock-cells = <0>;
                        clock-frequency = <81000000>;
                };
+
+               upg_clk: upg_clk {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <27000000>;
+               };
        };
 
        rdb {
@@ -49,7 +55,7 @@
                compatible = "simple-bus";
                ranges = <0 0x10000000 0x01000000>;
 
-               periph_intc: periph_intc@41a400 {
+               periph_intc: interrupt-controller@41a400 {
                        compatible = "brcm,bcm7038-l1-intc";
                        reg = <0x41a400 0x30>, <0x41a600 0x30>;
 
@@ -60,7 +66,7 @@
                        interrupts = <2>, <3>;
                };
 
-               sun_l2_intc: sun_l2_intc@403000 {
+               sun_l2_intc: interrupt-controller@403000 {
                        compatible = "brcm,l2-intc";
                        reg = <0x403000 0x30>;
                        interrupt-controller;
@@ -83,7 +89,7 @@
                                                     "vice_0";
                };
 
-               upg_irq0_intc: upg_irq0_intc@406780 {
+               upg_irq0_intc: interrupt-controller@406780 {
                        compatible = "brcm,bcm7120-l2-intc";
                        reg = <0x406780 0x8>;
 
@@ -98,7 +104,7 @@
                        interrupt-names = "upg_main", "upg_bsc";
                };
 
-               upg_aon_irq0_intc: upg_aon_irq0_intc@409480 {
+               upg_aon_irq0_intc: interrupt-controller@409480 {
                        compatible = "brcm,bcm7120-l2-intc";
                        reg = <0x409480 0x8>;
 
@@ -209,6 +215,59 @@
                      status = "disabled";
                };
 
+               pwma: pwm@406580 {
+                       compatible = "brcm,bcm7038-pwm";
+                       reg = <0x406580 0x28>;
+                       #pwm-cells = <2>;
+                       clocks = <&upg_clk>;
+                       status = "disabled";
+               };
+
+               pwmb: pwm@406800 {
+                       compatible = "brcm,bcm7038-pwm";
+                       reg = <0x406800 0x28>;
+                       #pwm-cells = <2>;
+                       clocks = <&upg_clk>;
+                       status = "disabled";
+               };
+
+               aon_pm_l2_intc: interrupt-controller@408440 {
+                       compatible = "brcm,l2-intc";
+                       reg = <0x408440 0x30>;
+                       interrupt-controller;
+                       #interrupt-cells = <1>;
+                       interrupt-parent = <&periph_intc>;
+                       interrupts = <49>;
+                       brcm,irq-can-wake;
+               };
+
+               upg_gio: gpio@406700 {
+                       compatible = "brcm,brcmstb-gpio";
+                       reg = <0x406700 0x80>;
+                       #gpio-cells = <2>;
+                       #interrupt-cells = <2>;
+                       gpio-controller;
+                       interrupt-controller;
+                       interrupt-parent = <&upg_irq0_intc>;
+                       interrupts = <6>;
+                       brcm,gpio-bank-widths = <32 32 32 21>;
+               };
+
+               upg_gio_aon: gpio@4094c0 {
+                       compatible = "brcm,brcmstb-gpio";
+                       reg = <0x4094c0 0x40>;
+                       #gpio-cells = <2>;
+                       #interrupt-cells = <2>;
+                       gpio-controller;
+                       interrupt-controller;
+                       interrupt-parent = <&upg_aon_irq0_intc>;
+                       interrupts = <6>;
+                       interrupts-extended = <&upg_aon_irq0_intc 6>,
+                                             <&aon_pm_l2_intc 5>;
+                       wakeup-source;
+                       brcm,gpio-bank-widths = <18 4>;
+               };
+
                enet0: ethernet@b80000 {
                        phy-mode = "internal";
                        phy-handle = <&phy1>;
@@ -312,6 +371,26 @@
                        status = "disabled";
                };
 
+               hif_l2_intc: interrupt-controller@41a000 {
+                       compatible = "brcm,l2-intc";
+                       reg = <0x41a000 0x30>;
+                       interrupt-controller;
+                       #interrupt-cells = <1>;
+                       interrupt-parent = <&periph_intc>;
+                       interrupts = <24>;
+               };
+
+               nand: nand@41b800 {
+                       compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg-names = "nand";
+                       reg = <0x41b800 0x400>;
+                       interrupt-parent = <&hif_l2_intc>;
+                       interrupts = <24>;
+                       status = "disabled";
+               };
+
                sata: sata@181000 {
                        compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
                        reg-names = "ahci", "top-ctrl";
@@ -351,5 +430,25 @@
                                #phy-cells = <0>;
                        };
                };
+
+               sdhci0: sdhci@419000 {
+                       compatible = "brcm,bcm7425-sdhci";
+                       reg = <0x419000 0x100>;
+                       interrupt-parent = <&periph_intc>;
+                       interrupts = <43>;
+                       sd-uhs-sdr50;
+                       mmc-hs200-1_8v;
+                       status = "disabled";
+               };
+
+               sdhci1: sdhci@419200 {
+                       compatible = "brcm,bcm7425-sdhci";
+                       reg = <0x419200 0x100>;
+                       interrupt-parent = <&periph_intc>;
+                       interrupts = <44>;
+                       sd-uhs-sdr50;
+                       mmc-hs200-1_8v;
+                       status = "disabled";
+               };
        };
 };