Merge branch 'linus' into perf/urgent, to pick up the upstream merged bits

[cascardo/linux.git] / drivers / edac / mce_amd.c

diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c
index f78c1c5..58586d5 100644 (file)
--- a/drivers/edac/mce_amd.c
+++ b/drivers/edac/mce_amd.c
@@ -138,6 +138,15 @@ static const char * const mc5_mce_desc[] = {
        "Retire status queue"
 };
 
+static const char * const mc6_mce_desc[] = {
+       "Hardware Assertion",
+       "Free List",
+       "Physical Register File",
+       "Retire Queue",
+       "Scheduler table",
+       "Status Register File",
+};
+
 static bool f12h_mc0_mce(u16 ec, u8 xec)
 {
        bool ret = false;
@@ -432,8 +441,8 @@ static bool k8_mc2_mce(u16 ec, u8 xec)
                pr_cont(": %s error in the L2 cache tags.\n", R4_MSG(ec));
        else if (xec == 0x0) {
                if (TLB_ERROR(ec))
-                       pr_cont(": %s error in a Page Descriptor Cache or "
-                               "Guest TLB.\n", TT_MSG(ec));
+                       pr_cont("%s error in a Page Descriptor Cache or Guest TLB.\n",
+                               TT_MSG(ec));
                else if (BUS_ERROR(ec))
                        pr_cont(": %s/ECC error in data read from NB: %s.\n",
                                R4_MSG(ec), PP_MSG(ec));
@@ -672,38 +681,10 @@ static void decode_mc6_mce(struct mce *m)
 
        pr_emerg(HW_ERR "MC6 Error: ");
 
-       switch (xec) {
-       case 0x0:
-               pr_cont("Hardware Assertion");
-               break;
-
-       case 0x1:
-               pr_cont("Free List");
-               break;
-
-       case 0x2:
-               pr_cont("Physical Register File");
-               break;
-
-       case 0x3:
-               pr_cont("Retire Queue");
-               break;
-
-       case 0x4:
-               pr_cont("Scheduler table");
-               break;
-
-       case 0x5:
-               pr_cont("Status Register File");
-               break;
-
-       default:
+       if (xec > 0x5)
                goto wrong_mc6_mce;
-               break;
-       }
-
-       pr_cont(" parity error.\n");
 
+       pr_cont("%s parity error.\n", mc6_mce_desc[xec]);
        return;
 
  wrong_mc6_mce:
@@ -800,7 +781,7 @@ int amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data)
        pr_cont("]: 0x%016llx\n", m->status);
 
        if (m->status & MCI_STATUS_ADDRV)
-               pr_emerg(HW_ERR "MC%d_ADDR: 0x%016llx\n", m->bank, m->addr);
+               pr_emerg(HW_ERR "MC%d Error Address: 0x%016llx\n", m->bank, m->addr);
 
        if (!fam_ops)
                goto err_code;