drm/i915: Remove stop-rings debugfs interface
[cascardo/linux.git] / drivers / gpu / drm / i915 / i915_drv.c
index fb5758f..7b9b6f9 100644 (file)
@@ -365,6 +365,12 @@ static int i915_getparam(struct drm_device *dev, void *data,
        case I915_PARAM_HAS_EXEC_SOFTPIN:
                value = 1;
                break;
+       case I915_PARAM_HAS_POOLED_EU:
+               value = HAS_POOLED_EU(dev);
+               break;
+       case I915_PARAM_MIN_EU_IN_POOL:
+               value = INTEL_INFO(dev)->min_eu_in_pool;
+               break;
        default:
                DRM_DEBUG("Unknown parameter %d\n", param->param);
                return -EINVAL;
@@ -1169,15 +1175,8 @@ static int i915_workqueues_init(struct drm_i915_private *dev_priv)
        if (dev_priv->hotplug.dp_wq == NULL)
                goto out_free_wq;
 
-       dev_priv->gpu_error.hangcheck_wq =
-               alloc_ordered_workqueue("i915-hangcheck", 0);
-       if (dev_priv->gpu_error.hangcheck_wq == NULL)
-               goto out_free_dp_wq;
-
        return 0;
 
-out_free_dp_wq:
-       destroy_workqueue(dev_priv->hotplug.dp_wq);
 out_free_wq:
        destroy_workqueue(dev_priv->wq);
 out_err:
@@ -1188,7 +1187,6 @@ out_err:
 
 static void i915_workqueues_cleanup(struct drm_i915_private *dev_priv)
 {
-       destroy_workqueue(dev_priv->gpu_error.hangcheck_wq);
        destroy_workqueue(dev_priv->hotplug.dp_wq);
        destroy_workqueue(dev_priv->wq);
 }
@@ -1984,7 +1982,7 @@ static int i915_drm_resume(struct drm_device *dev)
        mutex_lock(&dev->struct_mutex);
        if (i915_gem_init_hw(dev)) {
                DRM_ERROR("failed to re-initialize GPU, declaring wedged!\n");
-                       atomic_or(I915_WEDGED, &dev_priv->gpu_error.reset_counter);
+               atomic_or(I915_WEDGED, &dev_priv->gpu_error.reset_counter);
        }
        mutex_unlock(&dev->struct_mutex);
 
@@ -2161,24 +2159,11 @@ int i915_reset(struct drm_i915_private *dev_priv)
                goto error;
        }
 
+       pr_notice("drm/i915: Resetting chip after gpu hang\n");
+
        i915_gem_reset(dev);
 
        ret = intel_gpu_reset(dev_priv, ALL_ENGINES);
-
-       /* Also reset the gpu hangman. */
-       if (error->stop_rings != 0) {
-               DRM_INFO("Simulated gpu hang, resetting stop_rings\n");
-               error->stop_rings = 0;
-               if (ret == -ENODEV) {
-                       DRM_INFO("Reset not implemented, but ignoring "
-                                "error for simulated gpu hangs\n");
-                       ret = 0;
-               }
-       }
-
-       if (i915_stop_ring_allow_warn(dev_priv))
-               pr_notice("drm/i915: Resetting chip after gpu hang\n");
-
        if (ret) {
                if (ret != -ENODEV)
                        DRM_ERROR("Failed to reset chip: %i\n", ret);
@@ -2588,8 +2573,7 @@ static int vlv_wait_for_gt_wells(struct drm_i915_private *dev_priv,
 
        mask = VLV_GTLC_PW_MEDIA_STATUS_MASK | VLV_GTLC_PW_RENDER_STATUS_MASK;
        val = wait_for_on ? mask : 0;
-#define COND ((I915_READ(VLV_GTLC_PW_STATUS) & mask) == val)
-       if (COND)
+       if ((I915_READ(VLV_GTLC_PW_STATUS) & mask) == val)
                return 0;
 
        DRM_DEBUG_KMS("waiting for GT wells to go %s (%08x)\n",
@@ -2600,13 +2584,14 @@ static int vlv_wait_for_gt_wells(struct drm_i915_private *dev_priv,
         * RC6 transitioning can be delayed up to 2 msec (see
         * valleyview_enable_rps), use 3 msec for safety.
         */
-       err = wait_for(COND, 3);
+       err = intel_wait_for_register(dev_priv,
+                                     VLV_GTLC_PW_STATUS, mask, val,
+                                     3);
        if (err)
                DRM_ERROR("timeout waiting for GT wells to go %s\n",
                          onoff(wait_for_on));
 
        return err;
-#undef COND
 }
 
 static void vlv_check_no_gt_access(struct drm_i915_private *dev_priv)
@@ -2737,11 +2722,8 @@ static int intel_runtime_suspend(struct device *device)
        i915_gem_release_all_mmaps(dev_priv);
        mutex_unlock(&dev->struct_mutex);
 
-       cancel_delayed_work_sync(&dev_priv->gpu_error.hangcheck_work);
-
        intel_guc_suspend(dev);
 
-       intel_suspend_gt_powersave(dev_priv);
        intel_runtime_pm_disable_interrupts(dev_priv);
 
        ret = 0;
@@ -2856,8 +2838,6 @@ static int intel_runtime_resume(struct device *device)
        if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv))
                intel_hpd_init(dev_priv);
 
-       intel_enable_gt_powersave(dev_priv);
-
        enable_rpm_wakeref_asserts(dev_priv);
 
        if (ret)