module_param(force_id, ushort, 0);
MODULE_PARM_DESC(force_id, "Override the detected device ID");
+static unsigned short fan_debounce;
+module_param(fan_debounce, ushort, 0);
+MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
+
#define DRVNAME "nct6775"
/*
#define SIO_NCT6779_ID 0xc560
#define SIO_ID_MASK 0xFFF0
+enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
+
static inline void
superio_outb(int ioreg, int reg, int val)
{
#define NCT6775_REG_FANDIV1 0x506
#define NCT6775_REG_FANDIV2 0x507
+#define NCT6775_REG_CR_FAN_DEBOUNCE 0xf0
+
static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
/* 0..15 voltages, 16..23 fans, 24..31 temperatures */
static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
+/* DC or PWM output fan configuration */
+static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
+static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
+
+/* Advanced Fan control, some values are common for all fans */
+
+static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301, 0x801, 0x901 };
+static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302, 0x802, 0x902 };
+static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
+ 0x103, 0x203, 0x303, 0x803, 0x903 };
+static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
+ 0x104, 0x204, 0x304, 0x804, 0x904 };
+static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
+ 0x105, 0x205, 0x305, 0x805, 0x905 };
+static const u16 NCT6775_REG_FAN_START_OUTPUT[]
+ = { 0x106, 0x206, 0x306, 0x806, 0x906 };
+static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
+static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
+
+static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
+ 0x107, 0x207, 0x307, 0x807, 0x907 };
+static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309, 0x809, 0x909 };
+static const u16 NCT6775_REG_PWM_READ[] = { 0x01, 0x03, 0x11, 0x13, 0x15 };
+
static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
+static const u16 NCT6775_REG_TEMP_SEL[] = {
+ 0x100, 0x200, 0x300, 0x800, 0x900 };
+
+static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
+ 0x139, 0x239, 0x339, 0x839, 0x939 };
+static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
+ 0x13a, 0x23a, 0x33a, 0x83a, 0x93a };
+static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
+ 0x13b, 0x23b, 0x33b, 0x83b, 0x93b };
+static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
+ 0x13c, 0x23c, 0x33c, 0x83c, 0x93c };
+static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
+ 0x13d, 0x23d, 0x33d, 0x83d, 0x93d };
+
static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
+static const u16 NCT6775_REG_AUTO_TEMP[] = {
+ 0x121, 0x221, 0x321, 0x821, 0x921 };
+static const u16 NCT6775_REG_AUTO_PWM[] = {
+ 0x127, 0x227, 0x327, 0x827, 0x927 };
+
+#define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p))
+#define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p))
+
+static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
+
+static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
+ 0x135, 0x235, 0x335, 0x835, 0x935 };
+static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
+ 0x138, 0x238, 0x338, 0x838, 0x938 };
+
static const char *const nct6775_temp_label[] = {
"",
"SYSTIN",
4, 5, 13, -1, -1, -1, /* temp1..temp6 */
12, 9 }; /* intrusion0, intrusion1 */
+static const u16 NCT6776_REG_TOLERANCE_H[] = {
+ 0x10c, 0x20c, 0x30c, 0x80c, 0x90c };
+
+static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0 };
+static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0 };
+
static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
+static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
+ 0x13e, 0x23e, 0x33e, 0x83e, 0x93e };
+
static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
static const u16 NCT6779_REG_FAN_PULSES[] = {
0x644, 0x645, 0x646, 0x647, 0x648 };
+static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
+ 0x136, 0x236, 0x336, 0x836, 0x936 };
+static const u16 NCT6779_REG_CRITICAL_PWM[] = {
+ 0x137, 0x237, 0x337, 0x837, 0x937 };
+
static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
0x18, 0x152 };
static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
= { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
+static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
+{
+ if (mode == 0 && pwm == 255)
+ return off;
+ return mode + 1;
+}
+
+static int pwm_enable_to_reg(enum pwm_enable mode)
+{
+ if (mode == off)
+ return 0;
+ return mode - 1;
+}
+
/*
* Conversions
*/
+/* 1 is DC mode, output in ms */
+static unsigned int step_time_from_reg(u8 reg, u8 mode)
+{
+ return mode ? 400 * reg : 100 * reg;
+}
+
+static u8 step_time_to_reg(unsigned int msec, u8 mode)
+{
+ return clamp_val((mode ? (msec + 200) / 400 :
+ (msec + 50) / 100), 1, 255);
+}
+
static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
{
if (reg == 0 || reg == 255)
return 1350000U / (reg << divreg);
}
+static u16 fan_to_reg(u32 fan, unsigned int divreg)
+{
+ if (!fan)
+ return 0;
+
+ return (1350000U / fan) >> divreg;
+}
+
static inline unsigned int
div_from_reg(u8 reg)
{
const char *name;
struct device *hwmon_dev;
- struct mutex lock;
u16 reg_temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
* 3=temp_crit
const u16 *REG_VIN;
const u16 *REG_IN_MINMAX[2];
+ const u16 *REG_TARGET;
const u16 *REG_FAN;
+ const u16 *REG_FAN_MODE;
const u16 *REG_FAN_MIN;
const u16 *REG_FAN_PULSES;
+ const u16 *REG_FAN_TIME[3];
+
+ const u16 *REG_TOLERANCE_H;
+
+ const u8 *REG_PWM_MODE;
+ const u8 *PWM_MODE_MASK;
+
+ const u16 *REG_PWM[7]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
+ * [3]=pwm_max, [4]=pwm_step,
+ * [5]=weight_duty_step, [6]=weight_duty_base
+ */
+ const u16 *REG_PWM_READ;
+
+ const u16 *REG_AUTO_TEMP;
+ const u16 *REG_AUTO_PWM;
+
+ const u16 *REG_CRITICAL_TEMP;
+ const u16 *REG_CRITICAL_TEMP_TOLERANCE;
const u16 *REG_TEMP_SOURCE; /* temp register sources */
+ const u16 *REG_TEMP_SEL;
+ const u16 *REG_WEIGHT_TEMP_SEL;
+ const u16 *REG_WEIGHT_TEMP[3]; /* 0=base, 1=tolerance, 2=step */
+
const u16 *REG_TEMP_OFFSET;
const u16 *REG_ALARM;
u16 fan_min[5];
u8 fan_pulses[5];
u8 fan_div[5];
+ u8 has_pwm;
u8 has_fan; /* some fan inputs can be disabled */
u8 has_fan_min; /* some fans don't have min register */
bool has_fan_div;
* 3=temp_crit */
u64 alarms;
+ u8 pwm_num; /* number of pwm */
+ u8 pwm_mode[5]; /* 1->DC variable voltage, 0->PWM variable duty cycle */
+ enum pwm_enable pwm_enable[5];
+ /* 0->off
+ * 1->manual
+ * 2->thermal cruise mode (also called SmartFan I)
+ * 3->fan speed cruise mode
+ * 4->SmartFan III
+ * 5->enhanced variable thermal cruise (SmartFan IV)
+ */
+ u8 pwm[7][5]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
+ * [3]=pwm_max, [4]=pwm_step,
+ * [5]=weight_duty_step, [6]=weight_duty_base
+ */
+
+ u8 target_temp[5];
+ u8 target_temp_mask;
+ u32 target_speed[5];
+ u32 target_speed_tolerance[5];
+ u8 speed_tolerance_limit;
+
+ u8 temp_tolerance[2][5];
+ u8 tolerance_mask;
+
+ u8 fan_time[3][5]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
+
+ /* Automatic fan speed control registers */
+ int auto_pwm_num;
+ u8 auto_pwm[5][7];
+ u8 auto_temp[5][7];
+ u8 pwm_temp_sel[5];
+ u8 pwm_weight_temp_sel[5];
+ u8 weight_temp[3][5]; /* 0->temp_step, 1->temp_step_tol,
+ * 2->temp_base
+ */
+
u8 vid;
u8 vrm;
u16 have_temp;
u16 have_temp_fixed;
u16 have_in;
+#ifdef CONFIG_PM
+ /* Remember extra register values over suspend/resume */
+ u8 vbat;
+ u8 fandiv1;
+ u8 fandiv2;
+#endif
};
struct nct6775_sio_data {
{
int res, word_sized = is_word_sized(data, reg);
- mutex_lock(&data->lock);
-
nct6775_set_bank(data, reg);
outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
res = inb_p(data->addr + DATA_REG_OFFSET);
data->addr + ADDR_REG_OFFSET);
res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
}
-
- mutex_unlock(&data->lock);
return res;
}
{
int word_sized = is_word_sized(data, reg);
- mutex_lock(&data->lock);
-
nct6775_set_bank(data, reg);
outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
if (word_sized) {
data->addr + ADDR_REG_OFFSET);
}
outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
-
- mutex_unlock(&data->lock);
return 0;
}
data->fan_div[1] = (i & 0x70) >> 4;
i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
data->fan_div[2] = i & 0x7;
- if (data->has_fan & (1<<3))
+ if (data->has_fan & (1 << 3))
data->fan_div[3] = (i & 0x70) >> 4;
}
* reading from the fan count register, even if it is not optimal.
* We'll compute a better divider later on.
*/
- for (i = 0; i < 3; i++) {
+ for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
if (!(data->has_fan & (1 << i)))
continue;
if (data->fan_div[i] == 0) {
* If fan_min is not set (0), set it to 0xff to disable it. This
* prevents the unnecessary warning when fanX_min is reported as 0.
*/
- for (i = 0; i < 5; i++) {
+ for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
if (data->has_fan_min & (1 << i)) {
reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
if (!reg)
}
}
+static void nct6775_update_pwm(struct device *dev)
+{
+ struct nct6775_data *data = dev_get_drvdata(dev);
+ int i, j;
+ int fanmodecfg, reg;
+ bool duty_is_dc;
+
+ for (i = 0; i < data->pwm_num; i++) {
+ if (!(data->has_pwm & (1 << i)))
+ continue;
+
+ duty_is_dc = data->REG_PWM_MODE[i] &&
+ (nct6775_read_value(data, data->REG_PWM_MODE[i])
+ & data->PWM_MODE_MASK[i]);
+ data->pwm_mode[i] = duty_is_dc;
+
+ fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
+ for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
+ if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
+ data->pwm[j][i]
+ = nct6775_read_value(data,
+ data->REG_PWM[j][i]);
+ }
+ }
+
+ data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
+ (fanmodecfg >> 4) & 7);
+
+ if (!data->temp_tolerance[0][i] ||
+ data->pwm_enable[i] != speed_cruise)
+ data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
+ if (!data->target_speed_tolerance[i] ||
+ data->pwm_enable[i] == speed_cruise) {
+ u8 t = fanmodecfg & 0x0f;
+ if (data->REG_TOLERANCE_H) {
+ t |= (nct6775_read_value(data,
+ data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
+ }
+ data->target_speed_tolerance[i] = t;
+ }
+
+ data->temp_tolerance[1][i] =
+ nct6775_read_value(data,
+ data->REG_CRITICAL_TEMP_TOLERANCE[i]);
+
+ reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
+ data->pwm_temp_sel[i] = reg & 0x1f;
+ /* If fan can stop, report floor as 0 */
+ if (reg & 0x80)
+ data->pwm[2][i] = 0;
+
+ reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
+ data->pwm_weight_temp_sel[i] = reg & 0x1f;
+ /* If weight is disabled, report weight source as 0 */
+ if (j == 1 && !(reg & 0x80))
+ data->pwm_weight_temp_sel[i] = 0;
+
+ /* Weight temp data */
+ for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
+ data->weight_temp[j][i]
+ = nct6775_read_value(data,
+ data->REG_WEIGHT_TEMP[j][i]);
+ }
+ }
+}
+
+static void nct6775_update_pwm_limits(struct device *dev)
+{
+ struct nct6775_data *data = dev_get_drvdata(dev);
+ int i, j;
+ u8 reg;
+ u16 reg_t;
+
+ for (i = 0; i < data->pwm_num; i++) {
+ if (!(data->has_pwm & (1 << i)))
+ continue;
+
+ for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
+ data->fan_time[j][i] =
+ nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
+ }
+
+ reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
+ /* Update only in matching mode or if never updated */
+ if (!data->target_temp[i] ||
+ data->pwm_enable[i] == thermal_cruise)
+ data->target_temp[i] = reg_t & data->target_temp_mask;
+ if (!data->target_speed[i] ||
+ data->pwm_enable[i] == speed_cruise) {
+ if (data->REG_TOLERANCE_H) {
+ reg_t |= (nct6775_read_value(data,
+ data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
+ }
+ data->target_speed[i] = reg_t;
+ }
+
+ for (j = 0; j < data->auto_pwm_num; j++) {
+ data->auto_pwm[i][j] =
+ nct6775_read_value(data,
+ NCT6775_AUTO_PWM(data, i, j));
+ data->auto_temp[i][j] =
+ nct6775_read_value(data,
+ NCT6775_AUTO_TEMP(data, i, j));
+ }
+
+ /* critical auto_pwm temperature data */
+ data->auto_temp[i][data->auto_pwm_num] =
+ nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
+
+ switch (data->kind) {
+ case nct6775:
+ reg = nct6775_read_value(data,
+ NCT6775_REG_CRITICAL_ENAB[i]);
+ data->auto_pwm[i][data->auto_pwm_num] =
+ (reg & 0x02) ? 0xff : 0x00;
+ break;
+ case nct6776:
+ data->auto_pwm[i][data->auto_pwm_num] = 0xff;
+ break;
+ case nct6779:
+ reg = nct6775_read_value(data,
+ NCT6779_REG_CRITICAL_PWM_ENABLE[i]);
+ if (reg & 1)
+ data->auto_pwm[i][data->auto_pwm_num] =
+ nct6775_read_value(data,
+ NCT6779_REG_CRITICAL_PWM[i]);
+ else
+ data->auto_pwm[i][data->auto_pwm_num] = 0xff;
+ break;
+ }
+ }
+}
+
static struct nct6775_data *nct6775_update_device(struct device *dev)
{
struct nct6775_data *data = dev_get_drvdata(dev);
mutex_lock(&data->update_lock);
- if (time_after(jiffies, data->last_updated + HZ + HZ/2)
+ if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
|| !data->valid) {
/* Fan clock dividers */
nct6775_update_fan_div_common(data);
}
/* Measured fan speeds and limits */
- for (i = 0; i < 5; i++) {
+ for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
u16 reg;
if (!(data->has_fan & (1 << i)))
nct6775_select_fan_div(dev, data, i, reg);
}
+ nct6775_update_pwm(dev);
+ nct6775_update_pwm_limits(dev);
+
/* Measured temperatures and limits */
for (i = 0; i < NUM_TEMP; i++) {
if (!(data->have_temp & (1 << i)))
continue;
- for (j = 0; j < 4; j++) {
+ for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
if (data->reg_temp[j][i])
data->temp[j][i]
= nct6775_read_temp(data,
return err;
mutex_lock(&data->update_lock);
data->in[nr][index] = in_to_reg(val, nr);
- nct6775_write_value(data, data->REG_IN_MINMAX[index-1][nr],
+ nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
data->in[nr][index]);
mutex_unlock(&data->update_lock);
return count;
#define NUM_TEMP_ALARM ARRAY_SIZE(sda_temp_alarm)
static ssize_t
-show_name(struct device *dev, struct device_attribute *attr, char *buf)
+show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
{
- struct nct6775_data *data = dev_get_drvdata(dev);
-
- return sprintf(buf, "%s\n", data->name);
-}
-
-static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
+ struct nct6775_data *data = nct6775_update_device(dev);
+ struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
-static ssize_t
-show_vid(struct device *dev, struct device_attribute *attr, char *buf)
-{
- struct nct6775_data *data = dev_get_drvdata(dev);
- return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
+ return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
}
-static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
-
-/* Case open detection */
-
static ssize_t
-clear_caseopen(struct device *dev, struct device_attribute *attr,
+store_pwm_mode(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct nct6775_data *data = dev_get_drvdata(dev);
- struct nct6775_sio_data *sio_data = dev->platform_data;
- int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
+ struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
+ int nr = sattr->index;
unsigned long val;
+ int err;
u8 reg;
- int ret;
- if (kstrtoul(buf, 10, &val) || val != 0)
- return -EINVAL;
+ err = kstrtoul(buf, 10, &val);
+ if (err < 0)
+ return err;
- mutex_lock(&data->update_lock);
+ if (val > 1)
+ return -EINVAL;
- /*
- * Use CR registers to clear caseopen status.
- * The CR registers are the same for all chips, and not all chips
- * support clearing the caseopen status through "regular" registers.
- */
- ret = superio_enter(sio_data->sioreg);
- if (ret) {
- count = ret;
- goto error;
+ /* Setting DC mode is not supported for all chips/channels */
+ if (data->REG_PWM_MODE[nr] == 0) {
+ if (val)
+ return -EINVAL;
+ return count;
}
- superio_select(sio_data->sioreg, NCT6775_LD_ACPI);
- reg = superio_inb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
- reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
- superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
- reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
- superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
- superio_exit(sio_data->sioreg);
-
- data->valid = false; /* Force cache refresh */
-error:
+ mutex_lock(&data->update_lock);
+ data->pwm_mode[nr] = val;
+ reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
+ reg &= ~data->PWM_MODE_MASK[nr];
+ if (val)
+ reg |= data->PWM_MODE_MASK[nr];
+ nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
mutex_unlock(&data->update_lock);
return count;
}
-static struct sensor_device_attribute sda_caseopen[] = {
- SENSOR_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
- clear_caseopen, INTRUSION_ALARM_BASE),
- SENSOR_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
- clear_caseopen, INTRUSION_ALARM_BASE + 1),
-};
-
-/*
- * Driver and device management
- */
-
-static void nct6775_device_remove_files(struct device *dev)
+static ssize_t
+show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
{
+ struct nct6775_data *data = nct6775_update_device(dev);
+ struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
+ int nr = sattr->nr;
+ int index = sattr->index;
+ int pwm;
+
/*
- * some entries in the following arrays may not have been used in
- * device_create_file(), but device_remove_file() will ignore them
+ * For automatic fan control modes, show current pwm readings.
+ * Otherwise, show the configured value.
*/
- int i;
- struct nct6775_data *data = dev_get_drvdata(dev);
+ if (index == 0 && data->pwm_enable[nr] > manual)
+ pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
+ else
+ pwm = data->pwm[index][nr];
- for (i = 0; i < data->in_num; i++)
- sysfs_remove_group(&dev->kobj, &nct6775_group_in[i]);
+ return sprintf(buf, "%d\n", pwm);
+}
- for (i = 0; i < 5; i++) {
- device_remove_file(dev, &sda_fan_input[i].dev_attr);
- device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
- device_remove_file(dev, &sda_fan_div[i].dev_attr);
- device_remove_file(dev, &sda_fan_min[i].dev_attr);
- device_remove_file(dev, &sda_fan_pulses[i].dev_attr);
- }
- for (i = 0; i < NUM_TEMP; i++) {
- if (!(data->have_temp & (1 << i)))
- continue;
- device_remove_file(dev, &sda_temp_input[i].dev_attr);
- device_remove_file(dev, &sda_temp_label[i].dev_attr);
- device_remove_file(dev, &sda_temp_max[i].dev_attr);
- device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
- device_remove_file(dev, &sda_temp_crit[i].dev_attr);
- if (!(data->have_temp_fixed & (1 << i)))
- continue;
- device_remove_file(dev, &sda_temp_type[i].dev_attr);
- device_remove_file(dev, &sda_temp_offset[i].dev_attr);
- if (i >= NUM_TEMP_ALARM)
- continue;
- device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
- }
+static ssize_t
+store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
+ size_t count)
+{
+ struct nct6775_data *data = dev_get_drvdata(dev);
+ struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
+ int nr = sattr->nr;
+ int index = sattr->index;
+ unsigned long val;
+ int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
+ int maxval[7]
+ = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
+ int err;
+ u8 reg;
- device_remove_file(dev, &sda_caseopen[0].dev_attr);
- device_remove_file(dev, &sda_caseopen[1].dev_attr);
+ err = kstrtoul(buf, 10, &val);
+ if (err < 0)
+ return err;
+ val = clamp_val(val, minval[index], maxval[index]);
- device_remove_file(dev, &dev_attr_name);
- device_remove_file(dev, &dev_attr_cpu0_vid);
+ mutex_lock(&data->update_lock);
+ data->pwm[index][nr] = val;
+ nct6775_write_value(data, data->REG_PWM[index][nr], val);
+ if (index == 2) { /* floor: disable if val == 0 */
+ reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
+ reg &= 0x7f;
+ if (val)
+ reg |= 0x80;
+ nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
+ }
+ mutex_unlock(&data->update_lock);
+ return count;
}
-/* Get the monitoring functions started */
-static inline void nct6775_init_device(struct nct6775_data *data)
+/* Returns 0 if OK, -EINVAL otherwise */
+static int check_trip_points(struct nct6775_data *data, int nr)
{
int i;
- u8 tmp, diode;
- /* Start monitoring if needed */
- if (data->REG_CONFIG) {
- tmp = nct6775_read_value(data, data->REG_CONFIG);
- if (!(tmp & 0x01))
- nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
+ for (i = 0; i < data->auto_pwm_num - 1; i++) {
+ if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
+ return -EINVAL;
}
-
- /* Enable temperature sensors if needed */
- for (i = 0; i < NUM_TEMP; i++) {
- if (!(data->have_temp & (1 << i)))
- continue;
- if (!data->reg_temp_config[i])
- continue;
- tmp = nct6775_read_value(data, data->reg_temp_config[i]);
- if (tmp & 0x01)
- nct6775_write_value(data, data->reg_temp_config[i],
- tmp & 0xfe);
+ for (i = 0; i < data->auto_pwm_num - 1; i++) {
+ if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
+ return -EINVAL;
}
+ /* validate critical temperature and pwm if enabled (pwm > 0) */
+ if (data->auto_pwm[nr][data->auto_pwm_num]) {
+ if (data->auto_temp[nr][data->auto_pwm_num - 1] >
+ data->auto_temp[nr][data->auto_pwm_num] ||
+ data->auto_pwm[nr][data->auto_pwm_num - 1] >
+ data->auto_pwm[nr][data->auto_pwm_num])
+ return -EINVAL;
+ }
+ return 0;
+}
- /* Enable VBAT monitoring if needed */
- tmp = nct6775_read_value(data, data->REG_VBAT);
- if (!(tmp & 0x01))
- nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
-
- diode = nct6775_read_value(data, data->REG_DIODE);
+static void pwm_update_registers(struct nct6775_data *data, int nr)
+{
+ u8 reg;
- for (i = 0; i < data->temp_fixed_num; i++) {
- if (!(data->have_temp_fixed & (1 << i)))
- continue;
- if ((tmp & (0x02 << i))) /* diode */
- data->temp_type[i] = 3 - ((diode >> i) & 0x02);
- else /* thermistor */
- data->temp_type[i] = 4;
+ switch (data->pwm_enable[nr]) {
+ case off:
+ case manual:
+ break;
+ case speed_cruise:
+ reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
+ reg = (reg & ~data->tolerance_mask) |
+ (data->target_speed_tolerance[nr] & data->tolerance_mask);
+ nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
+ nct6775_write_value(data, data->REG_TARGET[nr],
+ data->target_speed[nr] & 0xff);
+ if (data->REG_TOLERANCE_H) {
+ reg = (data->target_speed[nr] >> 8) & 0x0f;
+ reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
+ nct6775_write_value(data,
+ data->REG_TOLERANCE_H[nr],
+ reg);
+ }
+ break;
+ case thermal_cruise:
+ nct6775_write_value(data, data->REG_TARGET[nr],
+ data->target_temp[nr]);
+ /* intentional */
+ default:
+ reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
+ reg = (reg & ~data->tolerance_mask) |
+ data->temp_tolerance[0][nr];
+ nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
+ break;
}
}
-static int
-nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data,
- struct nct6775_data *data)
+static ssize_t
+show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
{
- int regval;
- bool fan3pin, fan3min, fan4pin, fan4min, fan5pin;
- int ret;
+ struct nct6775_data *data = nct6775_update_device(dev);
+ struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
+
+ return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
+}
+
+static ssize_t
+store_pwm_enable(struct device *dev, struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct nct6775_data *data = dev_get_drvdata(dev);
+ struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
+ int nr = sattr->index;
+ unsigned long val;
+ int err;
+ u16 reg;
+
+ err = kstrtoul(buf, 10, &val);
+ if (err < 0)
+ return err;
+
+ if (val > sf4)
+ return -EINVAL;
+
+ if (val == sf3 && data->kind != nct6775)
+ return -EINVAL;
+
+ if (val == sf4 && check_trip_points(data, nr)) {
+ dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
+ dev_err(dev, "Adjust trip points and try again\n");
+ return -EINVAL;
+ }
+
+ mutex_lock(&data->update_lock);
+ data->pwm_enable[nr] = val;
+ if (val == off) {
+ /*
+ * turn off pwm control: select manual mode, set pwm to maximum
+ */
+ data->pwm[0][nr] = 255;
+ nct6775_write_value(data, data->REG_PWM[0][nr], 255);
+ }
+ pwm_update_registers(data, nr);
+ reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
+ reg &= 0x0f;
+ reg |= pwm_enable_to_reg(val) << 4;
+ nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
+ mutex_unlock(&data->update_lock);
+ return count;
+}
+
+static ssize_t
+show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
+{
+ int i, sel = 0;
+
+ for (i = 0; i < NUM_TEMP; i++) {
+ if (!(data->have_temp & (1 << i)))
+ continue;
+ if (src == data->temp_src[i]) {
+ sel = i + 1;
+ break;
+ }
+ }
+
+ return sprintf(buf, "%d\n", sel);
+}
+
+static ssize_t
+show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ struct nct6775_data *data = nct6775_update_device(dev);
+ struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
+ int index = sattr->index;
+
+ return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
+}
+
+static ssize_t
+store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct nct6775_data *data = nct6775_update_device(dev);
+ struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
+ int nr = sattr->index;
+ unsigned long val;
+ int err, reg, src;
+
+ err = kstrtoul(buf, 10, &val);
+ if (err < 0)
+ return err;
+ if (val == 0 || val > NUM_TEMP)
+ return -EINVAL;
+ if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
+ return -EINVAL;
+
+ mutex_lock(&data->update_lock);
+ src = data->temp_src[val - 1];
+ data->pwm_temp_sel[nr] = src;
+ reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
+ reg &= 0xe0;
+ reg |= src;
+ nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
+ mutex_unlock(&data->update_lock);
+
+ return count;
+}
+
+static ssize_t
+show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
+ char *buf)
+{
+ struct nct6775_data *data = nct6775_update_device(dev);
+ struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
+ int index = sattr->index;
+
+ return show_pwm_temp_sel_common(data, buf,
+ data->pwm_weight_temp_sel[index]);
+}
+
+static ssize_t
+store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct nct6775_data *data = nct6775_update_device(dev);
+ struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
+ int nr = sattr->index;
+ unsigned long val;
+ int err, reg, src;
+
+ err = kstrtoul(buf, 10, &val);
+ if (err < 0)
+ return err;
+ if (val > NUM_TEMP)
+ return -EINVAL;
+ if (val && (!(data->have_temp & (1 << (val - 1))) ||
+ !data->temp_src[val - 1]))
+ return -EINVAL;
+
+ mutex_lock(&data->update_lock);
+ if (val) {
+ src = data->temp_src[val - 1];
+ data->pwm_weight_temp_sel[nr] = src;
+ reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
+ reg &= 0xe0;
+ reg |= (src | 0x80);
+ nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
+ } else {
+ data->pwm_weight_temp_sel[nr] = 0;
+ reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
+ reg &= 0x7f;
+ nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
+ }
+ mutex_unlock(&data->update_lock);
+
+ return count;
+}
+
+static ssize_t
+show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ struct nct6775_data *data = nct6775_update_device(dev);
+ struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
+
+ return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
+}
+
+static ssize_t
+store_target_temp(struct device *dev, struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct nct6775_data *data = dev_get_drvdata(dev);
+ struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
+ int nr = sattr->index;
+ unsigned long val;
+ int err;
+
+ err = kstrtoul(buf, 10, &val);
+ if (err < 0)
+ return err;
+
+ val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
+ data->target_temp_mask);
+
+ mutex_lock(&data->update_lock);
+ data->target_temp[nr] = val;
+ pwm_update_registers(data, nr);
+ mutex_unlock(&data->update_lock);
+ return count;
+}
+
+static ssize_t
+show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ struct nct6775_data *data = nct6775_update_device(dev);
+ struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
+ int nr = sattr->index;
+
+ return sprintf(buf, "%d\n",
+ fan_from_reg16(data->target_speed[nr],
+ data->fan_div[nr]));
+}
+
+static ssize_t
+store_target_speed(struct device *dev, struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct nct6775_data *data = dev_get_drvdata(dev);
+ struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
+ int nr = sattr->index;
+ unsigned long val;
+ int err;
+ u16 speed;
+
+ err = kstrtoul(buf, 10, &val);
+ if (err < 0)
+ return err;
+
+ val = clamp_val(val, 0, 1350000U);
+ speed = fan_to_reg(val, data->fan_div[nr]);
+
+ mutex_lock(&data->update_lock);
+ data->target_speed[nr] = speed;
+ pwm_update_registers(data, nr);
+ mutex_unlock(&data->update_lock);
+ return count;
+}
+
+static ssize_t
+show_temp_tolerance(struct device *dev, struct device_attribute *attr,
+ char *buf)
+{
+ struct nct6775_data *data = nct6775_update_device(dev);
+ struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
+ int nr = sattr->nr;
+ int index = sattr->index;
+
+ return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
+}
+
+static ssize_t
+store_temp_tolerance(struct device *dev, struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct nct6775_data *data = dev_get_drvdata(dev);
+ struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
+ int nr = sattr->nr;
+ int index = sattr->index;
+ unsigned long val;
+ int err;
+
+ err = kstrtoul(buf, 10, &val);
+ if (err < 0)
+ return err;
+
+ /* Limit tolerance as needed */
+ val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
+
+ mutex_lock(&data->update_lock);
+ data->temp_tolerance[index][nr] = val;
+ if (index)
+ pwm_update_registers(data, nr);
+ else
+ nct6775_write_value(data,
+ data->REG_CRITICAL_TEMP_TOLERANCE[nr],
+ val);
+ mutex_unlock(&data->update_lock);
+ return count;
+}
+
+/*
+ * Fan speed tolerance is a tricky beast, since the associated register is
+ * a tick counter, but the value is reported and configured as rpm.
+ * Compute resulting low and high rpm values and report the difference.
+ */
+static ssize_t
+show_speed_tolerance(struct device *dev, struct device_attribute *attr,
+ char *buf)
+{
+ struct nct6775_data *data = nct6775_update_device(dev);
+ struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
+ int nr = sattr->index;
+ int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
+ int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
+ int tolerance;
+
+ if (low <= 0)
+ low = 1;
+ if (high > 0xffff)
+ high = 0xffff;
+ if (high < low)
+ high = low;
+
+ tolerance = (fan_from_reg16(low, data->fan_div[nr])
+ - fan_from_reg16(high, data->fan_div[nr])) / 2;
+
+ return sprintf(buf, "%d\n", tolerance);
+}
+
+static ssize_t
+store_speed_tolerance(struct device *dev, struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct nct6775_data *data = dev_get_drvdata(dev);
+ struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
+ int nr = sattr->index;
+ unsigned long val;
+ int err;
+ int low, high;
+
+ err = kstrtoul(buf, 10, &val);
+ if (err < 0)
+ return err;
+
+ high = fan_from_reg16(data->target_speed[nr],
+ data->fan_div[nr]) + val;
+ low = fan_from_reg16(data->target_speed[nr],
+ data->fan_div[nr]) - val;
+ if (low <= 0)
+ low = 1;
+ if (high < low)
+ high = low;
+
+ val = (fan_to_reg(low, data->fan_div[nr]) -
+ fan_to_reg(high, data->fan_div[nr])) / 2;
+
+ /* Limit tolerance as needed */
+ val = clamp_val(val, 0, data->speed_tolerance_limit);
+
+ mutex_lock(&data->update_lock);
+ data->target_speed_tolerance[nr] = val;
+ pwm_update_registers(data, nr);
+ mutex_unlock(&data->update_lock);
+ return count;
+}
+
+static SENSOR_DEVICE_ATTR_2(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
+static SENSOR_DEVICE_ATTR_2(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1, 0);
+static SENSOR_DEVICE_ATTR_2(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2, 0);
+static SENSOR_DEVICE_ATTR_2(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3, 0);
+static SENSOR_DEVICE_ATTR_2(pwm5, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 4, 0);
+
+static SENSOR_DEVICE_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
+ store_pwm_mode, 0);
+static SENSOR_DEVICE_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
+ store_pwm_mode, 1);
+static SENSOR_DEVICE_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
+ store_pwm_mode, 2);
+static SENSOR_DEVICE_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
+ store_pwm_mode, 3);
+static SENSOR_DEVICE_ATTR(pwm5_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
+ store_pwm_mode, 4);
+
+static SENSOR_DEVICE_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
+ store_pwm_enable, 0);
+static SENSOR_DEVICE_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
+ store_pwm_enable, 1);
+static SENSOR_DEVICE_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
+ store_pwm_enable, 2);
+static SENSOR_DEVICE_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
+ store_pwm_enable, 3);
+static SENSOR_DEVICE_ATTR(pwm5_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
+ store_pwm_enable, 4);
+
+static SENSOR_DEVICE_ATTR(pwm1_temp_sel, S_IWUSR | S_IRUGO,
+ show_pwm_temp_sel, store_pwm_temp_sel, 0);
+static SENSOR_DEVICE_ATTR(pwm2_temp_sel, S_IWUSR | S_IRUGO,
+ show_pwm_temp_sel, store_pwm_temp_sel, 1);
+static SENSOR_DEVICE_ATTR(pwm3_temp_sel, S_IWUSR | S_IRUGO,
+ show_pwm_temp_sel, store_pwm_temp_sel, 2);
+static SENSOR_DEVICE_ATTR(pwm4_temp_sel, S_IWUSR | S_IRUGO,
+ show_pwm_temp_sel, store_pwm_temp_sel, 3);
+static SENSOR_DEVICE_ATTR(pwm5_temp_sel, S_IWUSR | S_IRUGO,
+ show_pwm_temp_sel, store_pwm_temp_sel, 4);
+
+static SENSOR_DEVICE_ATTR(pwm1_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
+ store_target_temp, 0);
+static SENSOR_DEVICE_ATTR(pwm2_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
+ store_target_temp, 1);
+static SENSOR_DEVICE_ATTR(pwm3_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
+ store_target_temp, 2);
+static SENSOR_DEVICE_ATTR(pwm4_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
+ store_target_temp, 3);
+static SENSOR_DEVICE_ATTR(pwm5_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
+ store_target_temp, 4);
+
+static SENSOR_DEVICE_ATTR(fan1_target, S_IWUSR | S_IRUGO, show_target_speed,
+ store_target_speed, 0);
+static SENSOR_DEVICE_ATTR(fan2_target, S_IWUSR | S_IRUGO, show_target_speed,
+ store_target_speed, 1);
+static SENSOR_DEVICE_ATTR(fan3_target, S_IWUSR | S_IRUGO, show_target_speed,
+ store_target_speed, 2);
+static SENSOR_DEVICE_ATTR(fan4_target, S_IWUSR | S_IRUGO, show_target_speed,
+ store_target_speed, 3);
+static SENSOR_DEVICE_ATTR(fan5_target, S_IWUSR | S_IRUGO, show_target_speed,
+ store_target_speed, 4);
+
+static SENSOR_DEVICE_ATTR(fan1_tolerance, S_IWUSR | S_IRUGO,
+ show_speed_tolerance, store_speed_tolerance, 0);
+static SENSOR_DEVICE_ATTR(fan2_tolerance, S_IWUSR | S_IRUGO,
+ show_speed_tolerance, store_speed_tolerance, 1);
+static SENSOR_DEVICE_ATTR(fan3_tolerance, S_IWUSR | S_IRUGO,
+ show_speed_tolerance, store_speed_tolerance, 2);
+static SENSOR_DEVICE_ATTR(fan4_tolerance, S_IWUSR | S_IRUGO,
+ show_speed_tolerance, store_speed_tolerance, 3);
+static SENSOR_DEVICE_ATTR(fan5_tolerance, S_IWUSR | S_IRUGO,
+ show_speed_tolerance, store_speed_tolerance, 4);
+
+/* Smart Fan registers */
+
+static ssize_t
+show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ struct nct6775_data *data = nct6775_update_device(dev);
+ struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
+ int nr = sattr->nr;
+ int index = sattr->index;
+
+ return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
+}
+
+static ssize_t
+store_weight_temp(struct device *dev, struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct nct6775_data *data = dev_get_drvdata(dev);
+ struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
+ int nr = sattr->nr;
+ int index = sattr->index;
+ unsigned long val;
+ int err;
+
+ err = kstrtoul(buf, 10, &val);
+ if (err < 0)
+ return err;
+
+ val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
+
+ mutex_lock(&data->update_lock);
+ data->weight_temp[index][nr] = val;
+ nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
+ mutex_unlock(&data->update_lock);
+ return count;
+}
+
+static SENSOR_DEVICE_ATTR(pwm1_weight_temp_sel, S_IWUSR | S_IRUGO,
+ show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
+ 0);
+static SENSOR_DEVICE_ATTR(pwm2_weight_temp_sel, S_IWUSR | S_IRUGO,
+ show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
+ 1);
+static SENSOR_DEVICE_ATTR(pwm3_weight_temp_sel, S_IWUSR | S_IRUGO,
+ show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
+ 2);
+static SENSOR_DEVICE_ATTR(pwm4_weight_temp_sel, S_IWUSR | S_IRUGO,
+ show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
+ 3);
+static SENSOR_DEVICE_ATTR(pwm5_weight_temp_sel, S_IWUSR | S_IRUGO,
+ show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
+ 4);
+
+static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step, S_IWUSR | S_IRUGO,
+ show_weight_temp, store_weight_temp, 0, 0);
+static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step, S_IWUSR | S_IRUGO,
+ show_weight_temp, store_weight_temp, 1, 0);
+static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step, S_IWUSR | S_IRUGO,
+ show_weight_temp, store_weight_temp, 2, 0);
+static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step, S_IWUSR | S_IRUGO,
+ show_weight_temp, store_weight_temp, 3, 0);
+static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step, S_IWUSR | S_IRUGO,
+ show_weight_temp, store_weight_temp, 4, 0);
+
+static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step_tol, S_IWUSR | S_IRUGO,
+ show_weight_temp, store_weight_temp, 0, 1);
+static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step_tol, S_IWUSR | S_IRUGO,
+ show_weight_temp, store_weight_temp, 1, 1);
+static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step_tol, S_IWUSR | S_IRUGO,
+ show_weight_temp, store_weight_temp, 2, 1);
+static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step_tol, S_IWUSR | S_IRUGO,
+ show_weight_temp, store_weight_temp, 3, 1);
+static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step_tol, S_IWUSR | S_IRUGO,
+ show_weight_temp, store_weight_temp, 4, 1);
+
+static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step_base, S_IWUSR | S_IRUGO,
+ show_weight_temp, store_weight_temp, 0, 2);
+static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step_base, S_IWUSR | S_IRUGO,
+ show_weight_temp, store_weight_temp, 1, 2);
+static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step_base, S_IWUSR | S_IRUGO,
+ show_weight_temp, store_weight_temp, 2, 2);
+static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step_base, S_IWUSR | S_IRUGO,
+ show_weight_temp, store_weight_temp, 3, 2);
+static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step_base, S_IWUSR | S_IRUGO,
+ show_weight_temp, store_weight_temp, 4, 2);
+
+static SENSOR_DEVICE_ATTR_2(pwm1_weight_duty_step, S_IWUSR | S_IRUGO,
+ show_pwm, store_pwm, 0, 5);
+static SENSOR_DEVICE_ATTR_2(pwm2_weight_duty_step, S_IWUSR | S_IRUGO,
+ show_pwm, store_pwm, 1, 5);
+static SENSOR_DEVICE_ATTR_2(pwm3_weight_duty_step, S_IWUSR | S_IRUGO,
+ show_pwm, store_pwm, 2, 5);
+static SENSOR_DEVICE_ATTR_2(pwm4_weight_duty_step, S_IWUSR | S_IRUGO,
+ show_pwm, store_pwm, 3, 5);
+static SENSOR_DEVICE_ATTR_2(pwm5_weight_duty_step, S_IWUSR | S_IRUGO,
+ show_pwm, store_pwm, 4, 5);
+
+/* duty_base is not supported on all chips */
+static struct sensor_device_attribute_2 sda_weight_duty_base[] = {
+ SENSOR_ATTR_2(pwm1_weight_duty_base, S_IWUSR | S_IRUGO,
+ show_pwm, store_pwm, 0, 6),
+ SENSOR_ATTR_2(pwm2_weight_duty_base, S_IWUSR | S_IRUGO,
+ show_pwm, store_pwm, 1, 6),
+ SENSOR_ATTR_2(pwm3_weight_duty_base, S_IWUSR | S_IRUGO,
+ show_pwm, store_pwm, 2, 6),
+ SENSOR_ATTR_2(pwm4_weight_duty_base, S_IWUSR | S_IRUGO,
+ show_pwm, store_pwm, 3, 6),
+ SENSOR_ATTR_2(pwm5_weight_duty_base, S_IWUSR | S_IRUGO,
+ show_pwm, store_pwm, 4, 6),
+};
+
+static ssize_t
+show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ struct nct6775_data *data = nct6775_update_device(dev);
+ struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
+ int nr = sattr->nr;
+ int index = sattr->index;
+
+ return sprintf(buf, "%d\n",
+ step_time_from_reg(data->fan_time[index][nr],
+ data->pwm_mode[nr]));
+}
+
+static ssize_t
+store_fan_time(struct device *dev, struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct nct6775_data *data = dev_get_drvdata(dev);
+ struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
+ int nr = sattr->nr;
+ int index = sattr->index;
+ unsigned long val;
+ int err;
+
+ err = kstrtoul(buf, 10, &val);
+ if (err < 0)
+ return err;
+
+ val = step_time_to_reg(val, data->pwm_mode[nr]);
+ mutex_lock(&data->update_lock);
+ data->fan_time[index][nr] = val;
+ nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
+ mutex_unlock(&data->update_lock);
+ return count;
+}
+
+static ssize_t
+show_name(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ struct nct6775_data *data = dev_get_drvdata(dev);
+
+ return sprintf(buf, "%s\n", data->name);
+}
+
+static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
+
+static SENSOR_DEVICE_ATTR_2(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
+ store_fan_time, 0, 0);
+static SENSOR_DEVICE_ATTR_2(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
+ store_fan_time, 1, 0);
+static SENSOR_DEVICE_ATTR_2(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
+ store_fan_time, 2, 0);
+static SENSOR_DEVICE_ATTR_2(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
+ store_fan_time, 3, 0);
+static SENSOR_DEVICE_ATTR_2(pwm5_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
+ store_fan_time, 4, 0);
+
+static SENSOR_DEVICE_ATTR_2(pwm1_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
+ store_fan_time, 0, 1);
+static SENSOR_DEVICE_ATTR_2(pwm2_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
+ store_fan_time, 1, 1);
+static SENSOR_DEVICE_ATTR_2(pwm3_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
+ store_fan_time, 2, 1);
+static SENSOR_DEVICE_ATTR_2(pwm4_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
+ store_fan_time, 3, 1);
+static SENSOR_DEVICE_ATTR_2(pwm5_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
+ store_fan_time, 4, 1);
+
+static SENSOR_DEVICE_ATTR_2(pwm1_step_down_time, S_IWUSR | S_IRUGO,
+ show_fan_time, store_fan_time, 0, 2);
+static SENSOR_DEVICE_ATTR_2(pwm2_step_down_time, S_IWUSR | S_IRUGO,
+ show_fan_time, store_fan_time, 1, 2);
+static SENSOR_DEVICE_ATTR_2(pwm3_step_down_time, S_IWUSR | S_IRUGO,
+ show_fan_time, store_fan_time, 2, 2);
+static SENSOR_DEVICE_ATTR_2(pwm4_step_down_time, S_IWUSR | S_IRUGO,
+ show_fan_time, store_fan_time, 3, 2);
+static SENSOR_DEVICE_ATTR_2(pwm5_step_down_time, S_IWUSR | S_IRUGO,
+ show_fan_time, store_fan_time, 4, 2);
+
+static SENSOR_DEVICE_ATTR_2(pwm1_start, S_IWUSR | S_IRUGO, show_pwm,
+ store_pwm, 0, 1);
+static SENSOR_DEVICE_ATTR_2(pwm2_start, S_IWUSR | S_IRUGO, show_pwm,
+ store_pwm, 1, 1);
+static SENSOR_DEVICE_ATTR_2(pwm3_start, S_IWUSR | S_IRUGO, show_pwm,
+ store_pwm, 2, 1);
+static SENSOR_DEVICE_ATTR_2(pwm4_start, S_IWUSR | S_IRUGO, show_pwm,
+ store_pwm, 3, 1);
+static SENSOR_DEVICE_ATTR_2(pwm5_start, S_IWUSR | S_IRUGO, show_pwm,
+ store_pwm, 4, 1);
+
+static SENSOR_DEVICE_ATTR_2(pwm1_floor, S_IWUSR | S_IRUGO, show_pwm,
+ store_pwm, 0, 2);
+static SENSOR_DEVICE_ATTR_2(pwm2_floor, S_IWUSR | S_IRUGO, show_pwm,
+ store_pwm, 1, 2);
+static SENSOR_DEVICE_ATTR_2(pwm3_floor, S_IWUSR | S_IRUGO, show_pwm,
+ store_pwm, 2, 2);
+static SENSOR_DEVICE_ATTR_2(pwm4_floor, S_IWUSR | S_IRUGO, show_pwm,
+ store_pwm, 3, 2);
+static SENSOR_DEVICE_ATTR_2(pwm5_floor, S_IWUSR | S_IRUGO, show_pwm,
+ store_pwm, 4, 2);
+
+static SENSOR_DEVICE_ATTR_2(pwm1_temp_tolerance, S_IWUSR | S_IRUGO,
+ show_temp_tolerance, store_temp_tolerance, 0, 0);
+static SENSOR_DEVICE_ATTR_2(pwm2_temp_tolerance, S_IWUSR | S_IRUGO,
+ show_temp_tolerance, store_temp_tolerance, 1, 0);
+static SENSOR_DEVICE_ATTR_2(pwm3_temp_tolerance, S_IWUSR | S_IRUGO,
+ show_temp_tolerance, store_temp_tolerance, 2, 0);
+static SENSOR_DEVICE_ATTR_2(pwm4_temp_tolerance, S_IWUSR | S_IRUGO,
+ show_temp_tolerance, store_temp_tolerance, 3, 0);
+static SENSOR_DEVICE_ATTR_2(pwm5_temp_tolerance, S_IWUSR | S_IRUGO,
+ show_temp_tolerance, store_temp_tolerance, 4, 0);
+
+static SENSOR_DEVICE_ATTR_2(pwm1_crit_temp_tolerance, S_IWUSR | S_IRUGO,
+ show_temp_tolerance, store_temp_tolerance, 0, 1);
+static SENSOR_DEVICE_ATTR_2(pwm2_crit_temp_tolerance, S_IWUSR | S_IRUGO,
+ show_temp_tolerance, store_temp_tolerance, 1, 1);
+static SENSOR_DEVICE_ATTR_2(pwm3_crit_temp_tolerance, S_IWUSR | S_IRUGO,
+ show_temp_tolerance, store_temp_tolerance, 2, 1);
+static SENSOR_DEVICE_ATTR_2(pwm4_crit_temp_tolerance, S_IWUSR | S_IRUGO,
+ show_temp_tolerance, store_temp_tolerance, 3, 1);
+static SENSOR_DEVICE_ATTR_2(pwm5_crit_temp_tolerance, S_IWUSR | S_IRUGO,
+ show_temp_tolerance, store_temp_tolerance, 4, 1);
+
+/* pwm_max is not supported on all chips */
+static struct sensor_device_attribute_2 sda_pwm_max[] = {
+ SENSOR_ATTR_2(pwm1_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
+ 0, 3),
+ SENSOR_ATTR_2(pwm2_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
+ 1, 3),
+ SENSOR_ATTR_2(pwm3_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
+ 2, 3),
+ SENSOR_ATTR_2(pwm4_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
+ 3, 3),
+ SENSOR_ATTR_2(pwm5_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
+ 4, 3),
+};
+
+/* pwm_step is not supported on all chips */
+static struct sensor_device_attribute_2 sda_pwm_step[] = {
+ SENSOR_ATTR_2(pwm1_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 4),
+ SENSOR_ATTR_2(pwm2_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1, 4),
+ SENSOR_ATTR_2(pwm3_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2, 4),
+ SENSOR_ATTR_2(pwm4_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3, 4),
+ SENSOR_ATTR_2(pwm5_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 4, 4),
+};
+
+static struct attribute *nct6775_attributes_pwm[5][20] = {
+ {
+ &sensor_dev_attr_pwm1.dev_attr.attr,
+ &sensor_dev_attr_pwm1_mode.dev_attr.attr,
+ &sensor_dev_attr_pwm1_enable.dev_attr.attr,
+ &sensor_dev_attr_pwm1_temp_sel.dev_attr.attr,
+ &sensor_dev_attr_pwm1_temp_tolerance.dev_attr.attr,
+ &sensor_dev_attr_pwm1_crit_temp_tolerance.dev_attr.attr,
+ &sensor_dev_attr_pwm1_target_temp.dev_attr.attr,
+ &sensor_dev_attr_fan1_target.dev_attr.attr,
+ &sensor_dev_attr_fan1_tolerance.dev_attr.attr,
+ &sensor_dev_attr_pwm1_stop_time.dev_attr.attr,
+ &sensor_dev_attr_pwm1_step_up_time.dev_attr.attr,
+ &sensor_dev_attr_pwm1_step_down_time.dev_attr.attr,
+ &sensor_dev_attr_pwm1_start.dev_attr.attr,
+ &sensor_dev_attr_pwm1_floor.dev_attr.attr,
+ &sensor_dev_attr_pwm1_weight_temp_sel.dev_attr.attr,
+ &sensor_dev_attr_pwm1_weight_temp_step.dev_attr.attr,
+ &sensor_dev_attr_pwm1_weight_temp_step_tol.dev_attr.attr,
+ &sensor_dev_attr_pwm1_weight_temp_step_base.dev_attr.attr,
+ &sensor_dev_attr_pwm1_weight_duty_step.dev_attr.attr,
+ NULL
+ },
+ {
+ &sensor_dev_attr_pwm2.dev_attr.attr,
+ &sensor_dev_attr_pwm2_mode.dev_attr.attr,
+ &sensor_dev_attr_pwm2_enable.dev_attr.attr,
+ &sensor_dev_attr_pwm2_temp_sel.dev_attr.attr,
+ &sensor_dev_attr_pwm2_temp_tolerance.dev_attr.attr,
+ &sensor_dev_attr_pwm2_crit_temp_tolerance.dev_attr.attr,
+ &sensor_dev_attr_pwm2_target_temp.dev_attr.attr,
+ &sensor_dev_attr_fan2_target.dev_attr.attr,
+ &sensor_dev_attr_fan2_tolerance.dev_attr.attr,
+ &sensor_dev_attr_pwm2_stop_time.dev_attr.attr,
+ &sensor_dev_attr_pwm2_step_up_time.dev_attr.attr,
+ &sensor_dev_attr_pwm2_step_down_time.dev_attr.attr,
+ &sensor_dev_attr_pwm2_start.dev_attr.attr,
+ &sensor_dev_attr_pwm2_floor.dev_attr.attr,
+ &sensor_dev_attr_pwm2_weight_temp_sel.dev_attr.attr,
+ &sensor_dev_attr_pwm2_weight_temp_step.dev_attr.attr,
+ &sensor_dev_attr_pwm2_weight_temp_step_tol.dev_attr.attr,
+ &sensor_dev_attr_pwm2_weight_temp_step_base.dev_attr.attr,
+ &sensor_dev_attr_pwm2_weight_duty_step.dev_attr.attr,
+ NULL
+ },
+ {
+ &sensor_dev_attr_pwm3.dev_attr.attr,
+ &sensor_dev_attr_pwm3_mode.dev_attr.attr,
+ &sensor_dev_attr_pwm3_enable.dev_attr.attr,
+ &sensor_dev_attr_pwm3_temp_sel.dev_attr.attr,
+ &sensor_dev_attr_pwm3_temp_tolerance.dev_attr.attr,
+ &sensor_dev_attr_pwm3_crit_temp_tolerance.dev_attr.attr,
+ &sensor_dev_attr_pwm3_target_temp.dev_attr.attr,
+ &sensor_dev_attr_fan3_target.dev_attr.attr,
+ &sensor_dev_attr_fan3_tolerance.dev_attr.attr,
+ &sensor_dev_attr_pwm3_stop_time.dev_attr.attr,
+ &sensor_dev_attr_pwm3_step_up_time.dev_attr.attr,
+ &sensor_dev_attr_pwm3_step_down_time.dev_attr.attr,
+ &sensor_dev_attr_pwm3_start.dev_attr.attr,
+ &sensor_dev_attr_pwm3_floor.dev_attr.attr,
+ &sensor_dev_attr_pwm3_weight_temp_sel.dev_attr.attr,
+ &sensor_dev_attr_pwm3_weight_temp_step.dev_attr.attr,
+ &sensor_dev_attr_pwm3_weight_temp_step_tol.dev_attr.attr,
+ &sensor_dev_attr_pwm3_weight_temp_step_base.dev_attr.attr,
+ &sensor_dev_attr_pwm3_weight_duty_step.dev_attr.attr,
+ NULL
+ },
+ {
+ &sensor_dev_attr_pwm4.dev_attr.attr,
+ &sensor_dev_attr_pwm4_mode.dev_attr.attr,
+ &sensor_dev_attr_pwm4_enable.dev_attr.attr,
+ &sensor_dev_attr_pwm4_temp_sel.dev_attr.attr,
+ &sensor_dev_attr_pwm4_temp_tolerance.dev_attr.attr,
+ &sensor_dev_attr_pwm4_crit_temp_tolerance.dev_attr.attr,
+ &sensor_dev_attr_pwm4_target_temp.dev_attr.attr,
+ &sensor_dev_attr_fan4_target.dev_attr.attr,
+ &sensor_dev_attr_fan4_tolerance.dev_attr.attr,
+ &sensor_dev_attr_pwm4_stop_time.dev_attr.attr,
+ &sensor_dev_attr_pwm4_step_up_time.dev_attr.attr,
+ &sensor_dev_attr_pwm4_step_down_time.dev_attr.attr,
+ &sensor_dev_attr_pwm4_start.dev_attr.attr,
+ &sensor_dev_attr_pwm4_floor.dev_attr.attr,
+ &sensor_dev_attr_pwm4_weight_temp_sel.dev_attr.attr,
+ &sensor_dev_attr_pwm4_weight_temp_step.dev_attr.attr,
+ &sensor_dev_attr_pwm4_weight_temp_step_tol.dev_attr.attr,
+ &sensor_dev_attr_pwm4_weight_temp_step_base.dev_attr.attr,
+ &sensor_dev_attr_pwm4_weight_duty_step.dev_attr.attr,
+ NULL
+ },
+ {
+ &sensor_dev_attr_pwm5.dev_attr.attr,
+ &sensor_dev_attr_pwm5_mode.dev_attr.attr,
+ &sensor_dev_attr_pwm5_enable.dev_attr.attr,
+ &sensor_dev_attr_pwm5_temp_sel.dev_attr.attr,
+ &sensor_dev_attr_pwm5_temp_tolerance.dev_attr.attr,
+ &sensor_dev_attr_pwm5_crit_temp_tolerance.dev_attr.attr,
+ &sensor_dev_attr_pwm5_target_temp.dev_attr.attr,
+ &sensor_dev_attr_fan5_target.dev_attr.attr,
+ &sensor_dev_attr_fan5_tolerance.dev_attr.attr,
+ &sensor_dev_attr_pwm5_stop_time.dev_attr.attr,
+ &sensor_dev_attr_pwm5_step_up_time.dev_attr.attr,
+ &sensor_dev_attr_pwm5_step_down_time.dev_attr.attr,
+ &sensor_dev_attr_pwm5_start.dev_attr.attr,
+ &sensor_dev_attr_pwm5_floor.dev_attr.attr,
+ &sensor_dev_attr_pwm5_weight_temp_sel.dev_attr.attr,
+ &sensor_dev_attr_pwm5_weight_temp_step.dev_attr.attr,
+ &sensor_dev_attr_pwm5_weight_temp_step_tol.dev_attr.attr,
+ &sensor_dev_attr_pwm5_weight_temp_step_base.dev_attr.attr,
+ &sensor_dev_attr_pwm5_weight_duty_step.dev_attr.attr,
+ NULL
+ },
+};
+
+static const struct attribute_group nct6775_group_pwm[5] = {
+ { .attrs = nct6775_attributes_pwm[0] },
+ { .attrs = nct6775_attributes_pwm[1] },
+ { .attrs = nct6775_attributes_pwm[2] },
+ { .attrs = nct6775_attributes_pwm[3] },
+ { .attrs = nct6775_attributes_pwm[4] },
+};
+
+static ssize_t
+show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ struct nct6775_data *data = nct6775_update_device(dev);
+ struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
+
+ return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
+}
+
+static ssize_t
+store_auto_pwm(struct device *dev, struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct nct6775_data *data = dev_get_drvdata(dev);
+ struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
+ int nr = sattr->nr;
+ int point = sattr->index;
+ unsigned long val;
+ int err;
+ u8 reg;
+
+ err = kstrtoul(buf, 10, &val);
+ if (err < 0)
+ return err;
+ if (val > 255)
+ return -EINVAL;
+
+ if (point == data->auto_pwm_num) {
+ if (data->kind != nct6775 && !val)
+ return -EINVAL;
+ if (data->kind != nct6779 && val)
+ val = 0xff;
+ }
+
+ mutex_lock(&data->update_lock);
+ data->auto_pwm[nr][point] = val;
+ if (point < data->auto_pwm_num) {
+ nct6775_write_value(data,
+ NCT6775_AUTO_PWM(data, nr, point),
+ data->auto_pwm[nr][point]);
+ } else {
+ switch (data->kind) {
+ case nct6775:
+ /* disable if needed (pwm == 0) */
+ reg = nct6775_read_value(data,
+ NCT6775_REG_CRITICAL_ENAB[nr]);
+ if (val)
+ reg |= 0x02;
+ else
+ reg &= ~0x02;
+ nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
+ reg);
+ break;
+ case nct6776:
+ break; /* always enabled, nothing to do */
+ case nct6779:
+ nct6775_write_value(data, NCT6779_REG_CRITICAL_PWM[nr],
+ val);
+ reg = nct6775_read_value(data,
+ NCT6779_REG_CRITICAL_PWM_ENABLE[nr]);
+ if (val == 255)
+ reg &= ~0x01;
+ else
+ reg |= 0x01;
+ nct6775_write_value(data,
+ NCT6779_REG_CRITICAL_PWM_ENABLE[nr],
+ reg);
+ break;
+ }
+ }
+ mutex_unlock(&data->update_lock);
+ return count;
+}
+
+static ssize_t
+show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ struct nct6775_data *data = nct6775_update_device(dev);
+ struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
+ int nr = sattr->nr;
+ int point = sattr->index;
+
+ /*
+ * We don't know for sure if the temperature is signed or unsigned.
+ * Assume it is unsigned.
+ */
+ return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
+}
+
+static ssize_t
+store_auto_temp(struct device *dev, struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct nct6775_data *data = dev_get_drvdata(dev);
+ struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
+ int nr = sattr->nr;
+ int point = sattr->index;
+ unsigned long val;
+ int err;
+
+ err = kstrtoul(buf, 10, &val);
+ if (err)
+ return err;
+ if (val > 255000)
+ return -EINVAL;
+
+ mutex_lock(&data->update_lock);
+ data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
+ if (point < data->auto_pwm_num) {
+ nct6775_write_value(data,
+ NCT6775_AUTO_TEMP(data, nr, point),
+ data->auto_temp[nr][point]);
+ } else {
+ nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
+ data->auto_temp[nr][point]);
+ }
+ mutex_unlock(&data->update_lock);
+ return count;
+}
+
+/*
+ * The number of auto-point trip points is chip dependent.
+ * Need to check support while generating/removing attribute files.
+ */
+static struct sensor_device_attribute_2 sda_auto_pwm_arrays[] = {
+ SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 0, 0),
+ SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 0, 0),
+ SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 0, 1),
+ SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 0, 1),
+ SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 0, 2),
+ SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 0, 2),
+ SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 0, 3),
+ SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 0, 3),
+ SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 0, 4),
+ SENSOR_ATTR_2(pwm1_auto_point5_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 0, 4),
+ SENSOR_ATTR_2(pwm1_auto_point6_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 0, 5),
+ SENSOR_ATTR_2(pwm1_auto_point6_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 0, 5),
+ SENSOR_ATTR_2(pwm1_auto_point7_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 0, 6),
+ SENSOR_ATTR_2(pwm1_auto_point7_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 0, 6),
+
+ SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 1, 0),
+ SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 1, 0),
+ SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 1, 1),
+ SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 1, 1),
+ SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 1, 2),
+ SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 1, 2),
+ SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 1, 3),
+ SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 1, 3),
+ SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 1, 4),
+ SENSOR_ATTR_2(pwm2_auto_point5_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 1, 4),
+ SENSOR_ATTR_2(pwm2_auto_point6_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 1, 5),
+ SENSOR_ATTR_2(pwm2_auto_point6_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 1, 5),
+ SENSOR_ATTR_2(pwm2_auto_point7_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 1, 6),
+ SENSOR_ATTR_2(pwm2_auto_point7_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 1, 6),
+
+ SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 2, 0),
+ SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 2, 0),
+ SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 2, 1),
+ SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 2, 1),
+ SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 2, 2),
+ SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 2, 2),
+ SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 2, 3),
+ SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 2, 3),
+ SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 2, 4),
+ SENSOR_ATTR_2(pwm3_auto_point5_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 2, 4),
+ SENSOR_ATTR_2(pwm3_auto_point6_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 2, 5),
+ SENSOR_ATTR_2(pwm3_auto_point6_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 2, 5),
+ SENSOR_ATTR_2(pwm3_auto_point7_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 2, 6),
+ SENSOR_ATTR_2(pwm3_auto_point7_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 2, 6),
+
+ SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 3, 0),
+ SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 3, 0),
+ SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 3, 1),
+ SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 3, 1),
+ SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 3, 2),
+ SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 3, 2),
+ SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 3, 3),
+ SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 3, 3),
+ SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 3, 4),
+ SENSOR_ATTR_2(pwm4_auto_point5_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 3, 4),
+ SENSOR_ATTR_2(pwm4_auto_point6_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 3, 5),
+ SENSOR_ATTR_2(pwm4_auto_point6_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 3, 5),
+ SENSOR_ATTR_2(pwm4_auto_point7_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 3, 6),
+ SENSOR_ATTR_2(pwm4_auto_point7_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 3, 6),
+
+ SENSOR_ATTR_2(pwm5_auto_point1_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 4, 0),
+ SENSOR_ATTR_2(pwm5_auto_point1_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 4, 0),
+ SENSOR_ATTR_2(pwm5_auto_point2_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 4, 1),
+ SENSOR_ATTR_2(pwm5_auto_point2_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 4, 1),
+ SENSOR_ATTR_2(pwm5_auto_point3_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 4, 2),
+ SENSOR_ATTR_2(pwm5_auto_point3_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 4, 2),
+ SENSOR_ATTR_2(pwm5_auto_point4_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 4, 3),
+ SENSOR_ATTR_2(pwm5_auto_point4_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 4, 3),
+ SENSOR_ATTR_2(pwm5_auto_point5_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 4, 4),
+ SENSOR_ATTR_2(pwm5_auto_point5_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 4, 4),
+ SENSOR_ATTR_2(pwm5_auto_point6_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 4, 5),
+ SENSOR_ATTR_2(pwm5_auto_point6_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 4, 5),
+ SENSOR_ATTR_2(pwm5_auto_point7_pwm, S_IWUSR | S_IRUGO,
+ show_auto_pwm, store_auto_pwm, 4, 6),
+ SENSOR_ATTR_2(pwm5_auto_point7_temp, S_IWUSR | S_IRUGO,
+ show_auto_temp, store_auto_temp, 4, 6),
+};
+
+static ssize_t
+show_vid(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ struct nct6775_data *data = dev_get_drvdata(dev);
+ return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
+}
+
+static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
+
+/* Case open detection */
+
+static ssize_t
+clear_caseopen(struct device *dev, struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct nct6775_data *data = dev_get_drvdata(dev);
+ struct nct6775_sio_data *sio_data = dev->platform_data;
+ int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
+ unsigned long val;
+ u8 reg;
+ int ret;
+
+ if (kstrtoul(buf, 10, &val) || val != 0)
+ return -EINVAL;
+
+ mutex_lock(&data->update_lock);
+
+ /*
+ * Use CR registers to clear caseopen status.
+ * The CR registers are the same for all chips, and not all chips
+ * support clearing the caseopen status through "regular" registers.
+ */
+ ret = superio_enter(sio_data->sioreg);
+ if (ret) {
+ count = ret;
+ goto error;
+ }
+
+ superio_select(sio_data->sioreg, NCT6775_LD_ACPI);
+ reg = superio_inb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
+ reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
+ superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
+ reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
+ superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
+ superio_exit(sio_data->sioreg);
+
+ data->valid = false; /* Force cache refresh */
+error:
+ mutex_unlock(&data->update_lock);
+ return count;
+}
+
+static struct sensor_device_attribute sda_caseopen[] = {
+ SENSOR_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
+ clear_caseopen, INTRUSION_ALARM_BASE),
+ SENSOR_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
+ clear_caseopen, INTRUSION_ALARM_BASE + 1),
+};
+
+/*
+ * Driver and device management
+ */
+
+static void nct6775_device_remove_files(struct device *dev)
+{
+ /*
+ * some entries in the following arrays may not have been used in
+ * device_create_file(), but device_remove_file() will ignore them
+ */
+ int i;
+ struct nct6775_data *data = dev_get_drvdata(dev);
+
+ for (i = 0; i < data->pwm_num; i++)
+ sysfs_remove_group(&dev->kobj, &nct6775_group_pwm[i]);
+
+ for (i = 0; i < ARRAY_SIZE(sda_pwm_max); i++)
+ device_remove_file(dev, &sda_pwm_max[i].dev_attr);
+
+ for (i = 0; i < ARRAY_SIZE(sda_pwm_step); i++)
+ device_remove_file(dev, &sda_pwm_step[i].dev_attr);
+
+ for (i = 0; i < ARRAY_SIZE(sda_weight_duty_base); i++)
+ device_remove_file(dev, &sda_weight_duty_base[i].dev_attr);
+
+ for (i = 0; i < ARRAY_SIZE(sda_auto_pwm_arrays); i++)
+ device_remove_file(dev, &sda_auto_pwm_arrays[i].dev_attr);
+
+ for (i = 0; i < data->in_num; i++)
+ sysfs_remove_group(&dev->kobj, &nct6775_group_in[i]);
+
+ for (i = 0; i < 5; i++) {
+ device_remove_file(dev, &sda_fan_input[i].dev_attr);
+ device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
+ device_remove_file(dev, &sda_fan_div[i].dev_attr);
+ device_remove_file(dev, &sda_fan_min[i].dev_attr);
+ device_remove_file(dev, &sda_fan_pulses[i].dev_attr);
+ }
+ for (i = 0; i < NUM_TEMP; i++) {
+ if (!(data->have_temp & (1 << i)))
+ continue;
+ device_remove_file(dev, &sda_temp_input[i].dev_attr);
+ device_remove_file(dev, &sda_temp_label[i].dev_attr);
+ device_remove_file(dev, &sda_temp_max[i].dev_attr);
+ device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
+ device_remove_file(dev, &sda_temp_crit[i].dev_attr);
+ if (!(data->have_temp_fixed & (1 << i)))
+ continue;
+ device_remove_file(dev, &sda_temp_type[i].dev_attr);
+ device_remove_file(dev, &sda_temp_offset[i].dev_attr);
+ if (i >= NUM_TEMP_ALARM)
+ continue;
+ device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
+ }
+
+ device_remove_file(dev, &sda_caseopen[0].dev_attr);
+ device_remove_file(dev, &sda_caseopen[1].dev_attr);
+
+ device_remove_file(dev, &dev_attr_name);
+ device_remove_file(dev, &dev_attr_cpu0_vid);
+}
+
+/* Get the monitoring functions started */
+static inline void nct6775_init_device(struct nct6775_data *data)
+{
+ int i;
+ u8 tmp, diode;
+
+ /* Start monitoring if needed */
+ if (data->REG_CONFIG) {
+ tmp = nct6775_read_value(data, data->REG_CONFIG);
+ if (!(tmp & 0x01))
+ nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
+ }
+
+ /* Enable temperature sensors if needed */
+ for (i = 0; i < NUM_TEMP; i++) {
+ if (!(data->have_temp & (1 << i)))
+ continue;
+ if (!data->reg_temp_config[i])
+ continue;
+ tmp = nct6775_read_value(data, data->reg_temp_config[i]);
+ if (tmp & 0x01)
+ nct6775_write_value(data, data->reg_temp_config[i],
+ tmp & 0xfe);
+ }
+
+ /* Enable VBAT monitoring if needed */
+ tmp = nct6775_read_value(data, data->REG_VBAT);
+ if (!(tmp & 0x01))
+ nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
+
+ diode = nct6775_read_value(data, data->REG_DIODE);
+
+ for (i = 0; i < data->temp_fixed_num; i++) {
+ if (!(data->have_temp_fixed & (1 << i)))
+ continue;
+ if ((tmp & (0x02 << i))) /* diode */
+ data->temp_type[i] = 3 - ((diode >> i) & 0x02);
+ else /* thermistor */
+ data->temp_type[i] = 4;
+ }
+}
+
+static int
+nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data,
+ struct nct6775_data *data)
+{
+ int regval;
+ bool fan3pin, fan3min, fan4pin, fan4min, fan5pin;
+ bool pwm3pin, pwm4pin, pwm5pin;
+ int ret;
ret = superio_enter(sio_data->sioreg);
if (ret)
fan3pin = regval & (1 << 6);
fan3min = fan3pin;
+ pwm3pin = regval & (1 << 7);
/* On NCT6775, fan4 shares pins with the fdc interface */
fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
fan4min = 0;
fan5pin = 0;
+ pwm4pin = 0;
+ pwm5pin = 0;
} else if (data->kind == nct6776) {
bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;
fan4min = fan4pin;
fan3min = fan3pin;
+ pwm3pin = fan3pin;
+ pwm4pin = 0;
+ pwm5pin = 0;
} else { /* NCT6779D */
regval = superio_inb(sio_data->sioreg, 0x1c);
fan4pin = !(regval & (1 << 6));
fan5pin = !(regval & (1 << 7));
+ pwm3pin = !(regval & (1 << 0));
+ pwm4pin = !(regval & (1 << 1));
+ pwm5pin = !(regval & (1 << 2));
+
fan3min = fan3pin;
fan4min = fan4pin;
}
data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
+ data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) | (pwm5pin << 4);
+
return 0;
}
+static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
+ int *available, int *mask)
+{
+ int i;
+ u8 src;
+
+ for (i = 0; i < data->pwm_num && *available; i++) {
+ int index;
+
+ if (!regp[i])
+ continue;
+ src = nct6775_read_value(data, regp[i]);
+ src &= 0x1f;
+ if (!src || (*mask & (1 << src)))
+ continue;
+ if (src >= data->temp_label_num ||
+ !strlen(data->temp_label[src]))
+ continue;
+
+ index = __ffs(*available);
+ nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
+ *available &= ~(1 << index);
+ *mask |= 1 << src;
+ }
+}
+
static int nct6775_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
const u16 *reg_temp_alternate, *reg_temp_crit;
int num_reg_temp;
+ bool have_vid = false;
+ u8 cr2a;
res = platform_get_resource(pdev, IORESOURCE_IO, 0);
if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
data->kind = sio_data->kind;
data->addr = res->start;
- mutex_init(&data->lock);
mutex_init(&data->update_lock);
data->name = nct6775_device_names[data->kind];
data->bank = 0xff; /* Force initial bank selection */
switch (data->kind) {
case nct6775:
data->in_num = 9;
+ data->pwm_num = 3;
+ data->auto_pwm_num = 6;
data->has_fan_div = true;
data->temp_fixed_num = 3;
data->fan_from_reg = fan_from_reg16;
data->fan_from_reg_min = fan_from_reg8;
+ data->target_temp_mask = 0x7f;
+ data->tolerance_mask = 0x0f;
+ data->speed_tolerance_limit = 15;
data->temp_label = nct6775_temp_label;
data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
data->REG_VIN = NCT6775_REG_IN;
data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
+ data->REG_TARGET = NCT6775_REG_TARGET;
data->REG_FAN = NCT6775_REG_FAN;
+ data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
+ data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
+ data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
+ data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
+ data->REG_PWM[0] = NCT6775_REG_PWM;
+ data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
+ data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
+ data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
+ data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
+ data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
+ data->REG_PWM_READ = NCT6775_REG_PWM_READ;
+ data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
+ data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
+ data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
+ data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
+ data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
+ data->REG_CRITICAL_TEMP_TOLERANCE
+ = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
+ data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
+ data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
+ data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
+ data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
+ data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
data->REG_ALARM = NCT6775_REG_ALARM;
reg_temp = NCT6775_REG_TEMP;
break;
case nct6776:
data->in_num = 9;
+ data->pwm_num = 3;
+ data->auto_pwm_num = 4;
data->has_fan_div = false;
data->temp_fixed_num = 3;
data->fan_from_reg = fan_from_reg13;
data->fan_from_reg_min = fan_from_reg13;
+ data->target_temp_mask = 0xff;
+ data->tolerance_mask = 0x07;
+ data->speed_tolerance_limit = 63;
data->temp_label = nct6776_temp_label;
data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
data->REG_VIN = NCT6775_REG_IN;
data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
+ data->REG_TARGET = NCT6775_REG_TARGET;
data->REG_FAN = NCT6775_REG_FAN;
+ data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
+ data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
+ data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
+ data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
+ data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
+ data->REG_PWM[0] = NCT6775_REG_PWM;
+ data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
+ data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
+ data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
+ data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
+ data->REG_PWM_READ = NCT6775_REG_PWM_READ;
+ data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
+ data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
+ data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
+ data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
+ data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
+ data->REG_CRITICAL_TEMP_TOLERANCE
+ = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
+ data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
+ data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
+ data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
+ data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
+ data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
data->REG_ALARM = NCT6775_REG_ALARM;
reg_temp = NCT6775_REG_TEMP;
break;
case nct6779:
data->in_num = 15;
+ data->pwm_num = 5;
+ data->auto_pwm_num = 4;
data->has_fan_div = false;
data->temp_fixed_num = 6;
data->fan_from_reg = fan_from_reg13;
data->fan_from_reg_min = fan_from_reg13;
+ data->target_temp_mask = 0xff;
+ data->tolerance_mask = 0x07;
+ data->speed_tolerance_limit = 63;
data->temp_label = nct6779_temp_label;
data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
data->REG_VIN = NCT6779_REG_IN;
data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
+ data->REG_TARGET = NCT6775_REG_TARGET;
data->REG_FAN = NCT6779_REG_FAN;
+ data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
+ data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
+ data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
+ data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
+ data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
+ data->REG_PWM[0] = NCT6775_REG_PWM;
+ data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
+ data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
+ data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
+ data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
+ data->REG_PWM_READ = NCT6775_REG_PWM_READ;
+ data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
+ data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
+ data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
+ data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
+ data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
+ data->REG_CRITICAL_TEMP_TOLERANCE
+ = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
+ data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
+ data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
+ data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
+ data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
+ data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
data->REG_ALARM = NCT6779_REG_ALARM;
reg_temp = NCT6779_REG_TEMP;
mask |= 1 << src;
}
+ /*
+ * Now find unmonitored temperature registers and enable monitoring
+ * if additional monitoring registers are available.
+ */
+ add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
+ add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
+
mask = 0;
s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */
for (i = 0; i < num_reg_temp; i++) {
}
#endif /* USE_ALTERNATE */
+ /* Initialize the chip */
+ nct6775_init_device(data);
+
+ err = superio_enter(sio_data->sioreg);
+ if (err)
+ return err;
+
+ cr2a = superio_inb(sio_data->sioreg, 0x2a);
switch (data->kind) {
case nct6775:
+ have_vid = (cr2a & 0x40);
break;
case nct6776:
- /*
- * On NCT6776, AUXTIN and VIN3 pins are shared.
- * Only way to detect it is to check if AUXTIN is used
- * as a temperature source, and if that source is
- * enabled.
- *
- * If that is the case, disable in6, which reports VIN3.
- * Otherwise disable temp3.
- */
- if (data->have_temp & (1 << 2)) {
- u8 reg = nct6775_read_value(data,
- data->reg_temp_config[2]);
- if (reg & 0x01)
- data->have_temp &= ~(1 << 2);
- else
- data->have_in &= ~(1 << 6);
- }
+ have_vid = (cr2a & 0x60) == 0x40;
break;
case nct6779:
- /*
- * Shared pins:
- * VIN4 / AUXTIN0
- * VIN5 / AUXTIN1
- * VIN6 / AUXTIN2
- * VIN7 / AUXTIN3
- *
- * There does not seem to be a clean way to detect if VINx or
- * AUXTINx is active, so for keep both sensor types enabled
- * for now.
- */
break;
}
- /* Initialize the chip */
- nct6775_init_device(data);
-
- data->vrm = vid_which_vrm();
- err = superio_enter(sio_data->sioreg);
- if (err)
- return err;
-
/*
* Read VID value
* We can get the VID input values directly at logical device D 0xe3.
*/
- superio_select(sio_data->sioreg, NCT6775_LD_VID);
- data->vid = superio_inb(sio_data->sioreg, 0xe3);
+ if (have_vid) {
+ superio_select(sio_data->sioreg, NCT6775_LD_VID);
+ data->vid = superio_inb(sio_data->sioreg, 0xe3);
+ data->vrm = vid_which_vrm();
+ }
+
+ if (fan_debounce) {
+ u8 tmp;
+
+ superio_select(sio_data->sioreg, NCT6775_LD_HWM);
+ tmp = superio_inb(sio_data->sioreg,
+ NCT6775_REG_CR_FAN_DEBOUNCE);
+ switch (data->kind) {
+ case nct6775:
+ tmp |= 0x1e;
+ break;
+ case nct6776:
+ case nct6779:
+ tmp |= 0x3e;
+ break;
+ }
+ superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
+ tmp);
+ dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
+ data->name);
+ }
+
superio_exit(sio_data->sioreg);
- err = device_create_file(dev, &dev_attr_cpu0_vid);
- if (err)
- return err;
+ if (have_vid) {
+ err = device_create_file(dev, &dev_attr_cpu0_vid);
+ if (err)
+ return err;
+ }
err = nct6775_check_fan_inputs(sio_data, data);
if (err)
/* Read fan clock dividers immediately */
nct6775_init_fan_common(dev, data);
+ /* Register sysfs hooks */
+ for (i = 0; i < data->pwm_num; i++) {
+ if (!(data->has_pwm & (1 << i)))
+ continue;
+
+ err = sysfs_create_group(&dev->kobj, &nct6775_group_pwm[i]);
+ if (err)
+ goto exit_remove;
+
+ if (data->REG_PWM[3]) {
+ err = device_create_file(dev,
+ &sda_pwm_max[i].dev_attr);
+ if (err)
+ goto exit_remove;
+ }
+ if (data->REG_PWM[4]) {
+ err = device_create_file(dev,
+ &sda_pwm_step[i].dev_attr);
+ if (err)
+ goto exit_remove;
+ }
+ if (data->REG_PWM[6]) {
+ err = device_create_file(dev,
+ &sda_weight_duty_base[i].dev_attr);
+ if (err)
+ goto exit_remove;
+ }
+ }
+ for (i = 0; i < ARRAY_SIZE(sda_auto_pwm_arrays); i++) {
+ struct sensor_device_attribute_2 *attr =
+ &sda_auto_pwm_arrays[i];
+
+ if (!(data->has_pwm & (1 << attr->nr)))
+ continue;
+ if (attr->index > data->auto_pwm_num)
+ continue;
+ err = device_create_file(dev, &attr->dev_attr);
+ if (err)
+ goto exit_remove;
+ }
+
for (i = 0; i < data->in_num; i++) {
if (!(data->have_in & (1 << i)))
continue;
goto exit_remove;
}
err = device_create_file(dev,
- &sda_fan_pulses[i].dev_attr);
+ &sda_fan_pulses[i].dev_attr);
if (err)
goto exit_remove;
}
return 0;
}
+#ifdef CONFIG_PM
+static int nct6775_suspend(struct device *dev)
+{
+ struct nct6775_data *data = nct6775_update_device(dev);
+ struct nct6775_sio_data *sio_data = dev->platform_data;
+
+ mutex_lock(&data->update_lock);
+ data->vbat = nct6775_read_value(data, data->REG_VBAT);
+ if (sio_data->kind == nct6775) {
+ data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
+ data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
+ }
+ mutex_unlock(&data->update_lock);
+
+ return 0;
+}
+
+static int nct6775_resume(struct device *dev)
+{
+ struct nct6775_data *data = dev_get_drvdata(dev);
+ struct nct6775_sio_data *sio_data = dev->platform_data;
+ int i, j;
+
+ mutex_lock(&data->update_lock);
+ data->bank = 0xff; /* Force initial bank selection */
+
+ /* Restore limits */
+ for (i = 0; i < data->in_num; i++) {
+ if (!(data->have_in & (1 << i)))
+ continue;
+
+ nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
+ data->in[i][1]);
+ nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
+ data->in[i][2]);
+ }
+
+ for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
+ if (!(data->has_fan_min & (1 << i)))
+ continue;
+
+ nct6775_write_value(data, data->REG_FAN_MIN[i],
+ data->fan_min[i]);
+ }
+
+ for (i = 0; i < NUM_TEMP; i++) {
+ if (!(data->have_temp & (1 << i)))
+ continue;
+
+ for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
+ if (data->reg_temp[j][i])
+ nct6775_write_temp(data, data->reg_temp[j][i],
+ data->temp[j][i]);
+ }
+
+ /* Restore other settings */
+ nct6775_write_value(data, data->REG_VBAT, data->vbat);
+ if (sio_data->kind == nct6775) {
+ nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
+ nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
+ }
+
+ /* Force re-reading all values */
+ data->valid = false;
+ mutex_unlock(&data->update_lock);
+
+ return 0;
+}
+
+static const struct dev_pm_ops nct6775_dev_pm_ops = {
+ .suspend = nct6775_suspend,
+ .resume = nct6775_resume,
+};
+
+#define NCT6775_DEV_PM_OPS (&nct6775_dev_pm_ops)
+#else
+#define NCT6775_DEV_PM_OPS NULL
+#endif /* CONFIG_PM */
+
static struct platform_driver nct6775_driver = {
.driver = {
.owner = THIS_MODULE,
.name = DRVNAME,
+ .pm = NCT6775_DEV_PM_OPS,
},
.probe = nct6775_probe,
.remove = nct6775_remove,
};
+static const char * const nct6775_sio_names[] __initconst = {
+ "NCT6775F",
+ "NCT6776D/F",
+ "NCT6779D",
+};
+
/* nct6775_find() looks for a '627 in the Super-I/O config space */
static int __init nct6775_find(int sioaddr, unsigned short *addr,
struct nct6775_sio_data *sio_data)
{
- static const char sio_name_NCT6775[] __initconst = "NCT6775F";
- static const char sio_name_NCT6776[] __initconst = "NCT6776F";
- static const char sio_name_NCT6779[] __initconst = "NCT6779D";
-
u16 val;
- const char *sio_name;
int err;
err = superio_enter(sioaddr);
switch (val & SIO_ID_MASK) {
case SIO_NCT6775_ID:
sio_data->kind = nct6775;
- sio_name = sio_name_NCT6775;
break;
case SIO_NCT6776_ID:
sio_data->kind = nct6776;
- sio_name = sio_name_NCT6776;
break;
case SIO_NCT6779_ID:
sio_data->kind = nct6779;
- sio_name = sio_name_NCT6779;
break;
default:
if (val != 0xffff)
}
superio_exit(sioaddr);
- pr_info("Found %s chip at %#x\n", sio_name, *addr);
+ pr_info("Found %s or compatible chip at %#x\n",
+ nct6775_sio_names[sio_data->kind], *addr);
sio_data->sioreg = sioaddr;
return 0;
projects / cascardo / linux.git / blobdiff