Pull mca-cleanup into release branch
[cascardo/linux.git] / drivers / net / bnx2.h
index 95d7f3b..9f691cb 100644 (file)
@@ -1,6 +1,6 @@
 /* bnx2.h: Broadcom NX2 network driver.
  *
- * Copyright (c) 2004, 2005 Broadcom Corporation
+ * Copyright (c) 2004, 2005, 2006 Broadcom Corporation
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -277,19 +277,7 @@ struct statistics_block {
  *  l2_fhdr definition
  */
 struct l2_fhdr {
-#if defined(__BIG_ENDIAN)
-       u16 l2_fhdr_errors;
-       u16 l2_fhdr_status;
-#elif defined(__LITTLE_ENDIAN)
-       u16 l2_fhdr_status;
-       u16 l2_fhdr_errors;
-#endif
-               #define L2_FHDR_ERRORS_BAD_CRC          (1<<1)
-               #define L2_FHDR_ERRORS_PHY_DECODE       (1<<2)
-               #define L2_FHDR_ERRORS_ALIGNMENT        (1<<3)
-               #define L2_FHDR_ERRORS_TOO_SHORT        (1<<4)
-               #define L2_FHDR_ERRORS_GIANT_FRAME      (1<<5)
-
+       u32 l2_fhdr_status;
                #define L2_FHDR_STATUS_RULE_CLASS       (0x7<<0)
                #define L2_FHDR_STATUS_RULE_P2          (1<<3)
                #define L2_FHDR_STATUS_RULE_P3          (1<<4)
@@ -301,6 +289,14 @@ struct l2_fhdr {
                #define L2_FHDR_STATUS_TCP_SEGMENT      (1<<14)
                #define L2_FHDR_STATUS_UDP_DATAGRAM     (1<<15)
 
+               #define L2_FHDR_ERRORS_BAD_CRC          (1<<17)
+               #define L2_FHDR_ERRORS_PHY_DECODE       (1<<18)
+               #define L2_FHDR_ERRORS_ALIGNMENT        (1<<19)
+               #define L2_FHDR_ERRORS_TOO_SHORT        (1<<20)
+               #define L2_FHDR_ERRORS_GIANT_FRAME      (1<<21)
+               #define L2_FHDR_ERRORS_TCP_XSUM         (1<<28)
+               #define L2_FHDR_ERRORS_UDP_XSUM         (1<<31)
+
        u32 l2_fhdr_hash;
 #if defined(__BIG_ENDIAN)
        u16 l2_fhdr_pkt_len;
@@ -4076,6 +4072,7 @@ struct bnx2 {
        struct net_device_stats net_stats;
 
        struct flash_spec       *flash_info;
+       u32                     flash_size;
 };
 
 static u32 bnx2_reg_rd_ind(struct bnx2 *bp, u32 offset);
@@ -4277,6 +4274,9 @@ struct fw_info {
 #define BNX2_SHARED_HW_CFG_LED_MODE_GPHY1       0x100
 #define BNX2_SHARED_HW_CFG_LED_MODE_GPHY2       0x200
 
+#define BNX2_SHARED_HW_CFG_CONFIG2             0x00000040
+#define BNX2_SHARED_HW_CFG2_NVM_SIZE_MASK       0x00fff000
+
 #define BNX2_DEV_INFO_BC_REV                   0x0000004c
 
 #define BNX2_PORT_HW_CFG_MAC_UPPER             0x00000050