cxgb4/cxgb4vf: For T6 adapter, set FBMIN to 64 bytes

[cascardo/linux.git] / drivers / net / ethernet / chelsio / cxgb4 / sge.c

diff --git a/drivers/net/ethernet/chelsio/cxgb4/sge.c b/drivers/net/ethernet/chelsio/cxgb4/sge.c
index 22d9720..deca4a2 100644 (file)
--- a/drivers/net/ethernet/chelsio/cxgb4/sge.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/sge.c
@@ -2611,8 +2611,18 @@ int t4_sge_alloc_rxq(struct adapter *adap, struct sge_rspq *iq, bool fwevtq,
                                htonl(FW_IQ_CMD_FL0CNGCHMAP_V(cong) |
                                      FW_IQ_CMD_FL0CONGCIF_F |
                                      FW_IQ_CMD_FL0CONGEN_F);
+               /* In T6, for egress queue type FL there is internal overhead
+                * of 16B for header going into FLM module.  Hence the maximum
+                * allowed burst size is 448 bytes.  For T4/T5, the hardware
+                * doesn't coalesce fetch requests if more than 64 bytes of
+                * Free List pointers are provided, so we use a 128-byte Fetch
+                * Burst Minimum there (T6 implements coalescing so we can use
+                * the smaller 64-byte value there).
+                */
                c.fl0dcaen_to_fl0cidxfthresh =
-                       htons(FW_IQ_CMD_FL0FBMIN_V(FETCHBURSTMIN_64B_X) |
+                       htons(FW_IQ_CMD_FL0FBMIN_V(chip <= CHELSIO_T5 ?
+                                                  FETCHBURSTMIN_128B_X :
+                                                  FETCHBURSTMIN_64B_X) |
                              FW_IQ_CMD_FL0FBMAX_V((chip <= CHELSIO_T5) ?
                                                   FETCHBURSTMAX_512B_X :
                                                   FETCHBURSTMAX_256B_X));