net/mlx4: Verify port number in __mlx4_unregister_mac

[cascardo/linux.git] / drivers / net / ethernet / mellanox / mlx4 / port.c

diff --git a/drivers/net/ethernet/mellanox/mlx4/port.c b/drivers/net/ethernet/mellanox/mlx4/port.c
index 7ab9717..9ba0c1c 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx4/port.c
+++ b/drivers/net/ethernet/mellanox/mlx4/port.c
@@ -244,10 +244,16 @@ EXPORT_SYMBOL_GPL(mlx4_get_base_qpn);
 
 void __mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac)
 {
-       struct mlx4_port_info *info = &mlx4_priv(dev)->port[port];
-       struct mlx4_mac_table *table = &info->mac_table;
+       struct mlx4_port_info *info;
+       struct mlx4_mac_table *table;
        int index;
 
+       if (port < 1 || port > dev->caps.num_ports) {
+               mlx4_warn(dev, "invalid port number (%d), aborting...\n", port);
+               return;
+       }
+       info = &mlx4_priv(dev)->port[port];
+       table = &info->mac_table;
        mutex_lock(&table->mutex);
        index = find_index(dev, table, mac);
 
@@ -1051,14 +1057,26 @@ int mlx4_SET_PORT_SCHEDULER(struct mlx4_dev *dev, u8 port, u8 *tc_tx_bw,
 
        for (i = 0; i < MLX4_NUM_TC; i++) {
                struct mlx4_port_scheduler_tc_cfg_be *tc = &context->tc[i];
-               u16 r = ratelimit && ratelimit[i] ? ratelimit[i] :
-                       MLX4_RATELIMIT_DEFAULT;
+               u16 r;
+
+               if (ratelimit && ratelimit[i]) {
+                       if (ratelimit[i] <= MLX4_MAX_100M_UNITS_VAL) {
+                               r = ratelimit[i];
+                               tc->max_bw_units =
+                                       htons(MLX4_RATELIMIT_100M_UNITS);
+                       } else {
+                               r = ratelimit[i]/10;
+                               tc->max_bw_units =
+                                       htons(MLX4_RATELIMIT_1G_UNITS);
+                       }
+                       tc->max_bw_value = htons(r);
+               } else {
+                       tc->max_bw_value = htons(MLX4_RATELIMIT_DEFAULT);
+                       tc->max_bw_units = htons(MLX4_RATELIMIT_1G_UNITS);
+               }
 
                tc->pg = htons(pg[i]);
                tc->bw_precentage = htons(tc_tx_bw[i]);
-
-               tc->max_bw_units = htons(MLX4_RATELIMIT_UNITS);
-               tc->max_bw_value = htons(r);
        }
 
        in_mod = MLX4_SET_PORT_SCHEDULER << 8 | port;