Merge branch 'for-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/bluetoot...

[cascardo/linux.git] / drivers / pci / host / pcie-designware.h

diff --git a/drivers/pci/host/pcie-designware.h b/drivers/pci/host/pcie-designware.h
index f437f9b..a567ea2 100644 (file)
--- a/drivers/pci/host/pcie-designware.h
+++ b/drivers/pci/host/pcie-designware.h
@@ -22,11 +22,6 @@
 #define MAX_MSI_IRQS                   32
 #define MAX_MSI_CTRLS                  (MAX_MSI_IRQS / 32)
 
-/* Parameters for the waiting for link up routine */
-#define LINK_WAIT_MAX_RETRIES          10
-#define LINK_WAIT_USLEEP_MIN           90000
-#define LINK_WAIT_USLEEP_MAX           100000
-
 struct pcie_port {
        struct device           *dev;
        u8                      root_bus_nr;
@@ -49,18 +44,18 @@ struct pcie_port {
        struct resource         *busn;
        int                     irq;
        u32                     lanes;
+       u32                     num_viewport;
        struct pcie_host_ops    *ops;
        int                     msi_irq;
        struct irq_domain       *irq_domain;
        unsigned long           msi_data;
+       u8                      iatu_unroll_enabled;
        DECLARE_BITMAP(msi_irq_in_use, MAX_MSI_IRQS);
 };
 
 struct pcie_host_ops {
-       void (*readl_rc)(struct pcie_port *pp,
-                       void __iomem *dbi_base, u32 *val);
-       void (*writel_rc)(struct pcie_port *pp,
-                       u32 val, void __iomem *dbi_base);
+       u32 (*readl_rc)(struct pcie_port *pp, u32 reg);
+       void (*writel_rc)(struct pcie_port *pp, u32 reg, u32 val);
        int (*rd_own_conf)(struct pcie_port *pp, int where, int size, u32 *val);
        int (*wr_own_conf)(struct pcie_port *pp, int where, int size, u32 val);
        int (*rd_other_conf)(struct pcie_port *pp, struct pci_bus *bus,
@@ -77,6 +72,8 @@ struct pcie_host_ops {
        int (*msi_host_init)(struct pcie_port *pp, struct msi_controller *chip);
 };
 
+u32 dw_pcie_readl_rc(struct pcie_port *pp, u32 reg);
+void dw_pcie_writel_rc(struct pcie_port *pp, u32 reg, u32 val);
 int dw_pcie_cfg_read(void __iomem *addr, int size, u32 *val);
 int dw_pcie_cfg_write(void __iomem *addr, int size, u32 val);
 irqreturn_t dw_handle_msi_irq(struct pcie_port *pp);