Merge tag 'multiplatform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...

[cascardo/linux.git] / drivers / pinctrl / pinctrl-sirf.c

diff --git a/drivers/pinctrl/pinctrl-sirf.c b/drivers/pinctrl/pinctrl-sirf.c
index eaea149..bc9d1be 100644 (file)
--- a/drivers/pinctrl/pinctrl-sirf.c
+++ b/drivers/pinctrl/pinctrl-sirf.c
@@ -14,6 +14,7 @@
 #include <linux/slab.h>
 #include <linux/err.h>
 #include <linux/irqdomain.h>
+#include <linux/irqchip/chained_irq.h>
 #include <linux/pinctrl/pinctrl.h>
 #include <linux/pinctrl/pinmux.h>
 #include <linux/pinctrl/consumer.h>
@@ -25,7 +26,6 @@
 #include <linux/bitops.h>
 #include <linux/gpio.h>
 #include <linux/of_gpio.h>
-#include <asm/mach/irq.h>
 
 #define DRIVER_NAME "pinmux-sirf"
 
@@ -979,7 +979,7 @@ static void sirfsoc_dt_free_map(struct pinctrl_dev *pctldev,
        kfree(map);
 }
 
-static struct pinctrl_ops sirfsoc_pctrl_ops = {
+static const struct pinctrl_ops sirfsoc_pctrl_ops = {
        .get_groups_count = sirfsoc_get_groups_count,
        .get_group_name = sirfsoc_get_group_name,
        .get_group_pins = sirfsoc_get_group_pins,
@@ -1181,7 +1181,7 @@ static int sirfsoc_pinmux_request_gpio(struct pinctrl_dev *pmxdev,
        return 0;
 }
 
-static struct pinmux_ops sirfsoc_pinmux_ops = {
+static const struct pinmux_ops sirfsoc_pinmux_ops = {
        .enable = sirfsoc_pinmux_enable,
        .disable = sirfsoc_pinmux_disable,
        .get_functions_count = sirfsoc_pinmux_get_funcs_count,
@@ -1682,15 +1682,12 @@ static void sirfsoc_gpio_set_pullup(const u32 *pullups)
        const unsigned long *p = (const unsigned long *)pullups;
 
        for (i = 0; i < SIRFSOC_GPIO_NO_OF_BANKS; i++) {
-               n = find_first_bit(p + i, BITS_PER_LONG);
-               while (n < BITS_PER_LONG) {
+               for_each_set_bit(n, p + i, BITS_PER_LONG) {
                        u32 offset = SIRFSOC_GPIO_CTRL(i, n);
                        u32 val = readl(sgpio_bank[i].chip.regs + offset);
                        val |= SIRFSOC_GPIO_CTL_PULL_MASK;
                        val |= SIRFSOC_GPIO_CTL_PULL_HIGH;
                        writel(val, sgpio_bank[i].chip.regs + offset);
-
-                       n = find_next_bit(p + i, BITS_PER_LONG, n + 1);
                }
        }
 }
@@ -1701,15 +1698,12 @@ static void sirfsoc_gpio_set_pulldown(const u32 *pulldowns)
        const unsigned long *p = (const unsigned long *)pulldowns;
 
        for (i = 0; i < SIRFSOC_GPIO_NO_OF_BANKS; i++) {
-               n = find_first_bit(p + i, BITS_PER_LONG);
-               while (n < BITS_PER_LONG) {
+               for_each_set_bit(n, p + i, BITS_PER_LONG) {
                        u32 offset = SIRFSOC_GPIO_CTRL(i, n);
                        u32 val = readl(sgpio_bank[i].chip.regs + offset);
                        val |= SIRFSOC_GPIO_CTL_PULL_MASK;
                        val &= ~SIRFSOC_GPIO_CTL_PULL_HIGH;
                        writel(val, sgpio_bank[i].chip.regs + offset);
-
-                       n = find_next_bit(p + i, BITS_PER_LONG, n + 1);
                }
        }
 }