#include <linux/kernel.h>
#include <linux/types.h>
+struct platform_device;
+
#define UNIPHIER_PINCTRL_PINMUX_BASE 0x0
#define UNIPHIER_PINCTRL_LOAD_PINMUX 0x700
#define UNIPHIER_PINCTRL_DRVCTRL_BASE 0x800
#define UNIPHIER_PINCTRL_DRV2CTRL_BASE 0x900
+#define UNIPHIER_PINCTRL_DRV3CTRL_BASE 0x980
#define UNIPHIER_PINCTRL_PUPDCTRL_BASE 0xa00
#define UNIPHIER_PINCTRL_IECTRL 0xd00
#define UNIPHIER_PIN_DRVCTRL_MASK ((1UL << (UNIPHIER_PIN_DRVCTRL_BITS)) \
- 1)
-/* supported drive strength (mA) */
-#define UNIPHIER_PIN_DRV_STR_SHIFT ((UNIPHIER_PIN_DRVCTRL_SHIFT) + \
+/* drive control type */
+#define UNIPHIER_PIN_DRV_TYPE_SHIFT ((UNIPHIER_PIN_DRVCTRL_SHIFT) + \
(UNIPHIER_PIN_DRVCTRL_BITS))
-#define UNIPHIER_PIN_DRV_STR_BITS 3
-#define UNIPHIER_PIN_DRV_STR_MASK ((1UL << (UNIPHIER_PIN_DRV_STR_BITS)) \
+#define UNIPHIER_PIN_DRV_TYPE_BITS 3
+#define UNIPHIER_PIN_DRV_TYPE_MASK ((1UL << (UNIPHIER_PIN_DRV_TYPE_BITS)) \
- 1)
/* pull-up / pull-down register number */
-#define UNIPHIER_PIN_PUPDCTRL_SHIFT ((UNIPHIER_PIN_DRV_STR_SHIFT) + \
- (UNIPHIER_PIN_DRV_STR_BITS))
+#define UNIPHIER_PIN_PUPDCTRL_SHIFT ((UNIPHIER_PIN_DRV_TYPE_SHIFT) + \
+ (UNIPHIER_PIN_DRV_TYPE_BITS))
#define UNIPHIER_PIN_PUPDCTRL_BITS 9
#define UNIPHIER_PIN_PUPDCTRL_MASK ((1UL << (UNIPHIER_PIN_PUPDCTRL_BITS))\
- 1)
#define UNIPHIER_PIN_IECTRL_NONE (UNIPHIER_PIN_IECTRL_MASK)
-/* selectable drive strength */
-enum uniphier_pin_drv_str {
- UNIPHIER_PIN_DRV_4_8, /* 2 level control: 4/8 mA */
- UNIPHIER_PIN_DRV_8_12_16_20, /* 4 level control: 8/12/16/20 mA */
- UNIPHIER_PIN_DRV_FIXED_4, /* fixed to 4mA */
- UNIPHIER_PIN_DRV_FIXED_5, /* fixed to 5mA */
- UNIPHIER_PIN_DRV_FIXED_8, /* fixed to 8mA */
+/* drive control type */
+enum uniphier_pin_drv_type {
+ UNIPHIER_PIN_DRV_1BIT, /* 2 level control: 4/8 mA */
+ UNIPHIER_PIN_DRV_2BIT, /* 4 level control: 8/12/16/20 mA */
+ UNIPHIER_PIN_DRV_3BIT, /* 8 level control: 4/5/7/9/11/12/14/16 mA */
+ UNIPHIER_PIN_DRV_FIXED4, /* fixed to 4mA */
+ UNIPHIER_PIN_DRV_FIXED5, /* fixed to 5mA */
+ UNIPHIER_PIN_DRV_FIXED8, /* fixed to 8mA */
UNIPHIER_PIN_DRV_NONE, /* no support (input only pin) */
};
(((x) & (UNIPHIER_PIN_IECTRL_MASK)) << (UNIPHIER_PIN_IECTRL_SHIFT))
#define UNIPHIER_PIN_DRVCTRL(x) \
(((x) & (UNIPHIER_PIN_DRVCTRL_MASK)) << (UNIPHIER_PIN_DRVCTRL_SHIFT))
-#define UNIPHIER_PIN_DRV_STR(x) \
- (((x) & (UNIPHIER_PIN_DRV_STR_MASK)) << (UNIPHIER_PIN_DRV_STR_SHIFT))
+#define UNIPHIER_PIN_DRV_TYPE(x) \
+ (((x) & (UNIPHIER_PIN_DRV_TYPE_MASK)) << (UNIPHIER_PIN_DRV_TYPE_SHIFT))
#define UNIPHIER_PIN_PUPDCTRL(x) \
(((x) & (UNIPHIER_PIN_PUPDCTRL_MASK)) << (UNIPHIER_PIN_PUPDCTRL_SHIFT))
#define UNIPHIER_PIN_PULL_DIR(x) \
(((x) & (UNIPHIER_PIN_PULL_DIR_MASK)) << (UNIPHIER_PIN_PULL_DIR_SHIFT))
-#define UNIPHIER_PIN_ATTR_PACKED(iectrl, drvctrl, drv_str, pupdctrl, pull_dir)\
+#define UNIPHIER_PIN_ATTR_PACKED(iectrl, drvctrl, drv_type, pupdctrl, pull_dir)\
(UNIPHIER_PIN_IECTRL(iectrl) | \
UNIPHIER_PIN_DRVCTRL(drvctrl) | \
- UNIPHIER_PIN_DRV_STR(drv_str) | \
+ UNIPHIER_PIN_DRV_TYPE(drv_type) | \
UNIPHIER_PIN_PUPDCTRL(pupdctrl) | \
UNIPHIER_PIN_PULL_DIR(pull_dir))
UNIPHIER_PIN_DRVCTRL_MASK;
}
-static inline unsigned int uniphier_pin_get_drv_str(void *drv_data)
+static inline unsigned int uniphier_pin_get_drv_type(void *drv_data)
{
- return ((unsigned long)drv_data >> UNIPHIER_PIN_DRV_STR_SHIFT) &
- UNIPHIER_PIN_DRV_STR_MASK;
+ return ((unsigned long)drv_data >> UNIPHIER_PIN_DRV_TYPE_SHIFT) &
+ UNIPHIER_PIN_DRV_TYPE_MASK;
}
static inline unsigned int uniphier_pin_get_pupdctrl(void *drv_data)
};
struct uniphier_pinctrl_socdata {
+ const struct pinctrl_pin_desc *pins;
+ unsigned int npins;
const struct uniphier_pinctrl_group *groups;
int groups_count;
const struct uniphier_pinmux_function *functions;
.num_groups = ARRAY_SIZE(func##_groups), \
}
-struct platform_device;
-struct pinctrl_desc;
-
int uniphier_pinctrl_probe(struct platform_device *pdev,
- struct pinctrl_desc *desc,
struct uniphier_pinctrl_socdata *socdata);
#endif /* __PINCTRL_UNIPHIER_H__ */