*
* Parameters:
* In:
- * dwIoBase - Base Address for MAC
+ * io_base - Base Address for MAC
* byRegOfs - Offset of MAC Register
* byTestBits - Test bits
* Out:
* Return Value: true if all test bits On; otherwise false
*
*/
-bool MACbIsRegBitsOn(void __iomem *dwIoBase, unsigned char byRegOfs,
+bool MACbIsRegBitsOn(struct vnt_private *priv, unsigned char byRegOfs,
unsigned char byTestBits)
{
- unsigned char byData;
+ void __iomem *io_base = priv->PortOffset;
- VNSvInPortB(dwIoBase + byRegOfs, &byData);
- return (byData & byTestBits) == byTestBits;
+ return (ioread8(io_base + byRegOfs) & byTestBits) == byTestBits;
}
/*
*
* Parameters:
* In:
- * dwIoBase - Base Address for MAC
+ * io_base - Base Address for MAC
* byRegOfs - Offset of MAC Register
* byTestBits - Test bits
* Out:
* Return Value: true if all test bits Off; otherwise false
*
*/
-bool MACbIsRegBitsOff(void __iomem *dwIoBase, unsigned char byRegOfs,
+bool MACbIsRegBitsOff(struct vnt_private *priv, unsigned char byRegOfs,
unsigned char byTestBits)
{
- unsigned char byData;
+ void __iomem *io_base = priv->PortOffset;
- VNSvInPortB(dwIoBase + byRegOfs, &byData);
- return !(byData & byTestBits);
+ return !(ioread8(io_base + byRegOfs) & byTestBits);
}
/*
*
* Parameters:
* In:
- * dwIoBase - Base Address for MAC
+ * io_base - Base Address for MAC
* Out:
* none
*
* Return Value: true if interrupt is disable; otherwise false
*
*/
-bool MACbIsIntDisable(void __iomem *dwIoBase)
+bool MACbIsIntDisable(struct vnt_private *priv)
{
- unsigned long dwData;
+ void __iomem *io_base = priv->PortOffset;
- VNSvInPortD(dwIoBase + MAC_REG_IMR, &dwData);
- if (dwData != 0)
+ if (ioread32(io_base + MAC_REG_IMR))
return false;
return true;
*
* Parameters:
* In:
- * dwIoBase - Base Address for MAC
+ * io_base - Base Address for MAC
* byRetryLimit- Retry Limit
* Out:
* none
* Return Value: none
*
*/
-void MACvSetShortRetryLimit(void __iomem *dwIoBase, unsigned char byRetryLimit)
+void MACvSetShortRetryLimit(struct vnt_private *priv, unsigned char byRetryLimit)
{
+ void __iomem *io_base = priv->PortOffset;
/* set SRT */
- VNSvOutPortB(dwIoBase + MAC_REG_SRT, byRetryLimit);
+ iowrite8(byRetryLimit, io_base + MAC_REG_SRT);
}
*
* Parameters:
* In:
- * dwIoBase - Base Address for MAC
+ * io_base - Base Address for MAC
* byRetryLimit- Retry Limit
* Out:
* none
* Return Value: none
*
*/
-void MACvSetLongRetryLimit(void __iomem *dwIoBase, unsigned char byRetryLimit)
+void MACvSetLongRetryLimit(struct vnt_private *priv, unsigned char byRetryLimit)
{
+ void __iomem *io_base = priv->PortOffset;
/* set LRT */
- VNSvOutPortB(dwIoBase + MAC_REG_LRT, byRetryLimit);
+ iowrite8(byRetryLimit, io_base + MAC_REG_LRT);
}
/*
*
* Parameters:
* In:
- * dwIoBase - Base Address for MAC
+ * io_base - Base Address for MAC
* byLoopbackMode - Loopback Mode
* Out:
* none
* Return Value: none
*
*/
-void MACvSetLoopbackMode(void __iomem *dwIoBase, unsigned char byLoopbackMode)
+void MACvSetLoopbackMode(struct vnt_private *priv, unsigned char byLoopbackMode)
{
- unsigned char byOrgValue;
+ void __iomem *io_base = priv->PortOffset;
byLoopbackMode <<= 6;
/* set TCR */
- VNSvInPortB(dwIoBase + MAC_REG_TEST, &byOrgValue);
- byOrgValue = byOrgValue & 0x3F;
- byOrgValue = byOrgValue | byLoopbackMode;
- VNSvOutPortB(dwIoBase + MAC_REG_TEST, byOrgValue);
+ iowrite8((ioread8(io_base + MAC_REG_TEST) & 0x3f) | byLoopbackMode,
+ io_base + MAC_REG_TEST);
}
/*
*
* Parameters:
* In:
- * dwIoBase - Base Address for MAC
+ * io_base - Base Address for MAC
* Out:
- * pbyCxtBuf - Context buffer
+ * cxt_buf - Context buffer
*
* Return Value: none
*
*/
-void MACvSaveContext(void __iomem *dwIoBase, unsigned char *pbyCxtBuf)
+void MACvSaveContext(struct vnt_private *priv, unsigned char *cxt_buf)
{
- int ii;
+ void __iomem *io_base = priv->PortOffset;
/* read page0 register */
- for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE0; ii++)
- VNSvInPortB((dwIoBase + ii), (pbyCxtBuf + ii));
+ memcpy_fromio(cxt_buf, io_base, MAC_MAX_CONTEXT_SIZE_PAGE0);
- MACvSelectPage1(dwIoBase);
+ MACvSelectPage1(io_base);
/* read page1 register */
- for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++)
- VNSvInPortB((dwIoBase + ii),
- (pbyCxtBuf + MAC_MAX_CONTEXT_SIZE_PAGE0 + ii));
+ memcpy_fromio(cxt_buf + MAC_MAX_CONTEXT_SIZE_PAGE0, io_base,
+ MAC_MAX_CONTEXT_SIZE_PAGE1);
- MACvSelectPage0(dwIoBase);
+ MACvSelectPage0(io_base);
}
/*
*
* Parameters:
* In:
- * dwIoBase - Base Address for MAC
- * pbyCxtBuf - Context buffer
+ * io_base - Base Address for MAC
+ * cxt_buf - Context buffer
* Out:
* none
*
* Return Value: none
*
*/
-void MACvRestoreContext(void __iomem *dwIoBase, unsigned char *pbyCxtBuf)
+void MACvRestoreContext(struct vnt_private *priv, unsigned char *cxt_buf)
{
- int ii;
+ void __iomem *io_base = priv->PortOffset;
- MACvSelectPage1(dwIoBase);
+ MACvSelectPage1(io_base);
/* restore page1 */
- for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++)
- VNSvOutPortB((dwIoBase + ii),
- *(pbyCxtBuf + MAC_MAX_CONTEXT_SIZE_PAGE0 + ii));
+ memcpy_toio(io_base, cxt_buf + MAC_MAX_CONTEXT_SIZE_PAGE0,
+ MAC_MAX_CONTEXT_SIZE_PAGE1);
- MACvSelectPage0(dwIoBase);
+ MACvSelectPage0(io_base);
/* restore RCR,TCR,IMR... */
- for (ii = MAC_REG_RCR; ii < MAC_REG_ISR; ii++)
- VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
+ memcpy_toio(io_base + MAC_REG_RCR, cxt_buf + MAC_REG_RCR,
+ MAC_REG_ISR - MAC_REG_RCR);
/* restore MAC Config. */
- for (ii = MAC_REG_LRT; ii < MAC_REG_PAGE1SEL; ii++)
- VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
+ memcpy_toio(io_base + MAC_REG_LRT, cxt_buf + MAC_REG_LRT,
+ MAC_REG_PAGE1SEL - MAC_REG_LRT);
- VNSvOutPortB(dwIoBase + MAC_REG_CFG, *(pbyCxtBuf + MAC_REG_CFG));
+ iowrite8(*(cxt_buf + MAC_REG_CFG), io_base + MAC_REG_CFG);
/* restore PS Config. */
- for (ii = MAC_REG_PSCFG; ii < MAC_REG_BBREGCTL; ii++)
- VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
+ memcpy_toio(io_base + MAC_REG_PSCFG, cxt_buf + MAC_REG_PSCFG,
+ MAC_REG_BBREGCTL - MAC_REG_PSCFG);
/* restore CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR */
- VNSvOutPortD(dwIoBase + MAC_REG_TXDMAPTR0,
- *(unsigned long *)(pbyCxtBuf + MAC_REG_TXDMAPTR0));
- VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR,
- *(unsigned long *)(pbyCxtBuf + MAC_REG_AC0DMAPTR));
- VNSvOutPortD(dwIoBase + MAC_REG_BCNDMAPTR,
- *(unsigned long *)(pbyCxtBuf + MAC_REG_BCNDMAPTR));
-
- VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR0,
- *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR0));
-
- VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR1,
- *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR1));
+ iowrite32(*(u32 *)(cxt_buf + MAC_REG_TXDMAPTR0),
+ io_base + MAC_REG_TXDMAPTR0);
+ iowrite32(*(u32 *)(cxt_buf + MAC_REG_AC0DMAPTR),
+ io_base + MAC_REG_AC0DMAPTR);
+ iowrite32(*(u32 *)(cxt_buf + MAC_REG_BCNDMAPTR),
+ io_base + MAC_REG_BCNDMAPTR);
+ iowrite32(*(u32 *)(cxt_buf + MAC_REG_RXDMAPTR0),
+ io_base + MAC_REG_RXDMAPTR0);
+ iowrite32(*(u32 *)(cxt_buf + MAC_REG_RXDMAPTR1),
+ io_base + MAC_REG_RXDMAPTR1);
}
/*
*
* Parameters:
* In:
- * dwIoBase - Base Address for MAC
+ * io_base - Base Address for MAC
* Out:
* none
*
* Return Value: true if Reset Success; otherwise false
*
*/
-bool MACbSoftwareReset(void __iomem *dwIoBase)
+bool MACbSoftwareReset(struct vnt_private *priv)
{
- unsigned char byData;
+ void __iomem *io_base = priv->PortOffset;
unsigned short ww;
/* turn on HOSTCR_SOFTRST, just write 0x01 to reset */
- VNSvOutPortB(dwIoBase + MAC_REG_HOSTCR, 0x01);
+ iowrite8(0x01, io_base + MAC_REG_HOSTCR);
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
- VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
- if (!(byData & HOSTCR_SOFTRST))
+ if (!(ioread8(io_base + MAC_REG_HOSTCR) & HOSTCR_SOFTRST))
break;
}
if (ww == W_MAX_TIMEOUT)
*
* Parameters:
* In:
- * dwIoBase - Base Address for MAC
+ * io_base - Base Address for MAC
* Out:
* none
*
* Return Value: true if success; otherwise false
*
*/
-bool MACbSafeSoftwareReset(void __iomem *dwIoBase)
+bool MACbSafeSoftwareReset(struct vnt_private *priv)
{
unsigned char abyTmpRegData[MAC_MAX_CONTEXT_SIZE_PAGE0+MAC_MAX_CONTEXT_SIZE_PAGE1];
bool bRetVal;
* reset, then restore register's value
*/
/* save MAC context */
- MACvSaveContext(dwIoBase, abyTmpRegData);
+ MACvSaveContext(priv, abyTmpRegData);
/* do reset */
- bRetVal = MACbSoftwareReset(dwIoBase);
+ bRetVal = MACbSoftwareReset(priv);
/* restore MAC context, except CR0 */
- MACvRestoreContext(dwIoBase, abyTmpRegData);
+ MACvRestoreContext(priv, abyTmpRegData);
return bRetVal;
}
*
* Parameters:
* In:
- * dwIoBase - Base Address for MAC
+ * io_base - Base Address for MAC
* Out:
* none
*
* Return Value: true if success; otherwise false
*
*/
-bool MACbSafeRxOff(void __iomem *dwIoBase)
+bool MACbSafeRxOff(struct vnt_private *priv)
{
+ void __iomem *io_base = priv->PortOffset;
unsigned short ww;
- unsigned long dwData;
- unsigned char byData;
/* turn off wow temp for turn off Rx safely */
/* Clear RX DMA0,1 */
- VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_CLRRUN);
- VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_CLRRUN);
+ iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_RXDMACTL0);
+ iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_RXDMACTL1);
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
- VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL0, &dwData);
- if (!(dwData & DMACTL_RUN))
+ if (!(ioread32(io_base + MAC_REG_RXDMACTL0) & DMACTL_RUN))
break;
}
if (ww == W_MAX_TIMEOUT) {
return false;
}
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
- VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL1, &dwData);
- if (!(dwData & DMACTL_RUN))
+ if (!(ioread32(io_base + MAC_REG_RXDMACTL1) & DMACTL_RUN))
break;
}
if (ww == W_MAX_TIMEOUT) {
}
/* try to safe shutdown RX */
- MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_RXON);
+ MACvRegBitsOff(io_base, MAC_REG_HOSTCR, HOSTCR_RXON);
/* W_MAX_TIMEOUT is the timeout period */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
- VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
- if (!(byData & HOSTCR_RXONST))
+ if (!(ioread8(io_base + MAC_REG_HOSTCR) & HOSTCR_RXONST))
break;
}
if (ww == W_MAX_TIMEOUT) {
*
* Parameters:
* In:
- * dwIoBase - Base Address for MAC
+ * io_base - Base Address for MAC
* Out:
* none
*
* Return Value: true if success; otherwise false
*
*/
-bool MACbSafeTxOff(void __iomem *dwIoBase)
+bool MACbSafeTxOff(struct vnt_private *priv)
{
+ void __iomem *io_base = priv->PortOffset;
unsigned short ww;
- unsigned long dwData;
- unsigned char byData;
/* Clear TX DMA */
/* Tx0 */
- VNSvOutPortD(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_CLRRUN);
+ iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_TXDMACTL0);
/* AC0 */
- VNSvOutPortD(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_CLRRUN);
+ iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_AC0DMACTL);
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
- VNSvInPortD(dwIoBase + MAC_REG_TXDMACTL0, &dwData);
- if (!(dwData & DMACTL_RUN))
+ if (!(ioread32(io_base + MAC_REG_TXDMACTL0) & DMACTL_RUN))
break;
}
if (ww == W_MAX_TIMEOUT) {
return false;
}
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
- VNSvInPortD(dwIoBase + MAC_REG_AC0DMACTL, &dwData);
- if (!(dwData & DMACTL_RUN))
+ if (!(ioread32(io_base + MAC_REG_AC0DMACTL) & DMACTL_RUN))
break;
}
if (ww == W_MAX_TIMEOUT) {
}
/* try to safe shutdown TX */
- MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_TXON);
+ MACvRegBitsOff(io_base, MAC_REG_HOSTCR, HOSTCR_TXON);
/* W_MAX_TIMEOUT is the timeout period */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
- VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
- if (!(byData & HOSTCR_TXONST))
+ if (!(ioread8(io_base + MAC_REG_HOSTCR) & HOSTCR_TXONST))
break;
}
if (ww == W_MAX_TIMEOUT) {
*
* Parameters:
* In:
- * dwIoBase - Base Address for MAC
+ * io_base - Base Address for MAC
* Out:
* none
*
* Return Value: true if success; otherwise false
*
*/
-bool MACbSafeStop(void __iomem *dwIoBase)
+bool MACbSafeStop(struct vnt_private *priv)
{
- MACvRegBitsOff(dwIoBase, MAC_REG_TCR, TCR_AUTOBCNTX);
+ void __iomem *io_base = priv->PortOffset;
- if (!MACbSafeRxOff(dwIoBase)) {
+ MACvRegBitsOff(io_base, MAC_REG_TCR, TCR_AUTOBCNTX);
+
+ if (!MACbSafeRxOff(priv)) {
pr_debug(" MACbSafeRxOff == false)\n");
- MACbSafeSoftwareReset(dwIoBase);
+ MACbSafeSoftwareReset(priv);
return false;
}
- if (!MACbSafeTxOff(dwIoBase)) {
+ if (!MACbSafeTxOff(priv)) {
pr_debug(" MACbSafeTxOff == false)\n");
- MACbSafeSoftwareReset(dwIoBase);
+ MACbSafeSoftwareReset(priv);
return false;
}
- MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_MACEN);
+ MACvRegBitsOff(io_base, MAC_REG_HOSTCR, HOSTCR_MACEN);
return true;
}
*
* Parameters:
* In:
- * dwIoBase - Base Address for MAC
+ * io_base - Base Address for MAC
* Out:
* none
*
* Return Value: true if success; otherwise false
*
*/
-bool MACbShutdown(void __iomem *dwIoBase)
+bool MACbShutdown(struct vnt_private *priv)
{
+ void __iomem *io_base = priv->PortOffset;
/* disable MAC IMR */
- MACvIntDisable(dwIoBase);
- MACvSetLoopbackMode(dwIoBase, MAC_LB_INTERNAL);
+ MACvIntDisable(io_base);
+ MACvSetLoopbackMode(priv, MAC_LB_INTERNAL);
/* stop the adapter */
- if (!MACbSafeStop(dwIoBase)) {
- MACvSetLoopbackMode(dwIoBase, MAC_LB_NONE);
+ if (!MACbSafeStop(priv)) {
+ MACvSetLoopbackMode(priv, MAC_LB_NONE);
return false;
}
- MACvSetLoopbackMode(dwIoBase, MAC_LB_NONE);
+ MACvSetLoopbackMode(priv, MAC_LB_NONE);
return true;
}
*
* Parameters:
* In:
- * dwIoBase - Base Address for MAC
+ * io_base - Base Address for MAC
* Out:
* none
*
* Return Value: none
*
*/
-void MACvInitialize(void __iomem *dwIoBase)
+void MACvInitialize(struct vnt_private *priv)
{
+ void __iomem *io_base = priv->PortOffset;
/* clear sticky bits */
- MACvClearStckDS(dwIoBase);
+ MACvClearStckDS(io_base);
/* disable force PME-enable */
- VNSvOutPortB(dwIoBase + MAC_REG_PMC1, PME_OVR);
+ iowrite8(PME_OVR, io_base + MAC_REG_PMC1);
/* only 3253 A */
/* do reset */
- MACbSoftwareReset(dwIoBase);
+ MACbSoftwareReset(priv);
/* reset TSF counter */
- VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
+ iowrite8(TFTCTL_TSFCNTRST, io_base + MAC_REG_TFTCTL);
/* enable TSF counter */
- VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
+ iowrite8(TFTCTL_TSFCNTREN, io_base + MAC_REG_TFTCTL);
}
/*
*
* Parameters:
* In:
- * dwIoBase - Base Address for MAC
- * dwCurrDescAddr - Descriptor Address
+ * io_base - Base Address for MAC
+ * curr_desc_addr - Descriptor Address
* Out:
* none
*
* Return Value: none
*
*/
-void MACvSetCurrRx0DescAddr(void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
+void MACvSetCurrRx0DescAddr(struct vnt_private *priv, u32 curr_desc_addr)
{
+ void __iomem *io_base = priv->PortOffset;
unsigned short ww;
- unsigned char byData;
- unsigned char byOrgDMACtl;
+ unsigned char org_dma_ctl;
- VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL0, &byOrgDMACtl);
- if (byOrgDMACtl & DMACTL_RUN)
- VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL0+2, DMACTL_RUN);
+ org_dma_ctl = ioread8(io_base + MAC_REG_RXDMACTL0);
+ if (org_dma_ctl & DMACTL_RUN)
+ iowrite8(DMACTL_RUN, io_base + MAC_REG_RXDMACTL0 + 2);
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
- VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL0, &byData);
- if (!(byData & DMACTL_RUN))
+ if (!(ioread8(io_base + MAC_REG_RXDMACTL0) & DMACTL_RUN))
break;
}
- VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR0, dwCurrDescAddr);
- if (byOrgDMACtl & DMACTL_RUN)
- VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_RUN);
+ iowrite32(curr_desc_addr, io_base + MAC_REG_RXDMAPTR0);
+ if (org_dma_ctl & DMACTL_RUN)
+ iowrite8(DMACTL_RUN, io_base + MAC_REG_RXDMACTL0);
}
/*
*
* Parameters:
* In:
- * dwIoBase - Base Address for MAC
- * dwCurrDescAddr - Descriptor Address
+ * io_base - Base Address for MAC
+ * curr_desc_addr - Descriptor Address
* Out:
* none
*
* Return Value: none
*
*/
-void MACvSetCurrRx1DescAddr(void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
+void MACvSetCurrRx1DescAddr(struct vnt_private *priv, u32 curr_desc_addr)
{
+ void __iomem *io_base = priv->PortOffset;
unsigned short ww;
- unsigned char byData;
- unsigned char byOrgDMACtl;
+ unsigned char org_dma_ctl;
- VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL1, &byOrgDMACtl);
- if (byOrgDMACtl & DMACTL_RUN)
- VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL1+2, DMACTL_RUN);
+ org_dma_ctl = ioread8(io_base + MAC_REG_RXDMACTL1);
+ if (org_dma_ctl & DMACTL_RUN)
+ iowrite8(DMACTL_RUN, io_base + MAC_REG_RXDMACTL1 + 2);
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
- VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL1, &byData);
- if (!(byData & DMACTL_RUN))
+ if (!(ioread8(io_base + MAC_REG_RXDMACTL1) & DMACTL_RUN))
break;
}
- VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR1, dwCurrDescAddr);
- if (byOrgDMACtl & DMACTL_RUN)
- VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_RUN);
+ iowrite32(curr_desc_addr, io_base + MAC_REG_RXDMAPTR1);
+ if (org_dma_ctl & DMACTL_RUN)
+ iowrite8(DMACTL_RUN, io_base + MAC_REG_RXDMACTL1);
}
*
* Parameters:
* In:
- * dwIoBase - Base Address for MAC
- * dwCurrDescAddr - Descriptor Address
+ * io_base - Base Address for MAC
+ * curr_desc_addr - Descriptor Address
* Out:
* none
*
* Return Value: none
*
*/
-void MACvSetCurrTx0DescAddrEx(void __iomem *dwIoBase,
- unsigned long dwCurrDescAddr)
+void MACvSetCurrTx0DescAddrEx(struct vnt_private *priv,
+ u32 curr_desc_addr)
{
+ void __iomem *io_base = priv->PortOffset;
unsigned short ww;
- unsigned char byData;
- unsigned char byOrgDMACtl;
+ unsigned char org_dma_ctl;
- VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byOrgDMACtl);
- if (byOrgDMACtl & DMACTL_RUN)
- VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0+2, DMACTL_RUN);
+ org_dma_ctl = ioread8(io_base + MAC_REG_TXDMACTL0);
+ if (org_dma_ctl & DMACTL_RUN)
+ iowrite8(DMACTL_RUN, io_base + MAC_REG_TXDMACTL0 + 2);
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
- VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byData);
- if (!(byData & DMACTL_RUN))
+ if (!(ioread8(io_base + MAC_REG_TXDMACTL0) & DMACTL_RUN))
break;
}
- VNSvOutPortD(dwIoBase + MAC_REG_TXDMAPTR0, dwCurrDescAddr);
- if (byOrgDMACtl & DMACTL_RUN)
- VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_RUN);
+ iowrite32(curr_desc_addr, io_base + MAC_REG_TXDMAPTR0);
+ if (org_dma_ctl & DMACTL_RUN)
+ iowrite8(DMACTL_RUN, io_base + MAC_REG_TXDMACTL0);
}
/*
*
* Parameters:
* In:
- * dwIoBase - Base Address for MAC
- * dwCurrDescAddr - Descriptor Address
+ * io_base - Base Address for MAC
+ * curr_desc_addr - Descriptor Address
* Out:
* none
*
*
*/
/* TxDMA1 = AC0DMA */
-void MACvSetCurrAC0DescAddrEx(void __iomem *dwIoBase,
- unsigned long dwCurrDescAddr)
+void MACvSetCurrAC0DescAddrEx(struct vnt_private *priv,
+ u32 curr_desc_addr)
{
+ void __iomem *io_base = priv->PortOffset;
unsigned short ww;
- unsigned char byData;
- unsigned char byOrgDMACtl;
+ unsigned char org_dma_ctl;
- VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byOrgDMACtl);
- if (byOrgDMACtl & DMACTL_RUN)
- VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL+2, DMACTL_RUN);
+ org_dma_ctl = ioread8(io_base + MAC_REG_AC0DMACTL);
+ if (org_dma_ctl & DMACTL_RUN)
+ iowrite8(DMACTL_RUN, io_base + MAC_REG_AC0DMACTL + 2);
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
- VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byData);
- if (!(byData & DMACTL_RUN))
+ if (!(ioread8(io_base + MAC_REG_AC0DMACTL) & DMACTL_RUN))
break;
}
if (ww == W_MAX_TIMEOUT)
pr_debug(" DBG_PORT80(0x26)\n");
- VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR, dwCurrDescAddr);
- if (byOrgDMACtl & DMACTL_RUN)
- VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_RUN);
+ iowrite32(curr_desc_addr, io_base + MAC_REG_AC0DMAPTR);
+ if (org_dma_ctl & DMACTL_RUN)
+ iowrite8(DMACTL_RUN, io_base + MAC_REG_AC0DMACTL);
}
-void MACvSetCurrTXDescAddr(int iTxType, void __iomem *dwIoBase,
- unsigned long dwCurrDescAddr)
+void MACvSetCurrTXDescAddr(int iTxType, struct vnt_private *priv,
+ u32 curr_desc_addr)
{
if (iTxType == TYPE_AC0DMA)
- MACvSetCurrAC0DescAddrEx(dwIoBase, dwCurrDescAddr);
+ MACvSetCurrAC0DescAddrEx(priv, curr_desc_addr);
else if (iTxType == TYPE_TXDMA0)
- MACvSetCurrTx0DescAddrEx(dwIoBase, dwCurrDescAddr);
+ MACvSetCurrTx0DescAddrEx(priv, curr_desc_addr);
}
/*
*
* Parameters:
* In:
- * dwIoBase - Base Address for MAC
+ * io_base - Base Address for MAC
* uDelay - Delay time (timer resolution is 4 us)
* Out:
* none
* Return Value: none
*
*/
-void MACvTimer0MicroSDelay(void __iomem *dwIoBase, unsigned int uDelay)
+void MACvTimer0MicroSDelay(struct vnt_private *priv, unsigned int uDelay)
{
+ void __iomem *io_base = priv->PortOffset;
unsigned char byValue;
unsigned int uu, ii;
- VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
- VNSvOutPortD(dwIoBase + MAC_REG_TMDATA0, uDelay);
- VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, (TMCTL_TMD | TMCTL_TE));
+ iowrite8(0, io_base + MAC_REG_TMCTL0);
+ iowrite32(uDelay, io_base + MAC_REG_TMDATA0);
+ iowrite8((TMCTL_TMD | TMCTL_TE), io_base + MAC_REG_TMCTL0);
for (ii = 0; ii < 66; ii++) { /* assume max PCI clock is 66Mhz */
for (uu = 0; uu < uDelay; uu++) {
- VNSvInPortB(dwIoBase + MAC_REG_TMCTL0, &byValue);
+ byValue = ioread8(io_base + MAC_REG_TMCTL0);
if ((byValue == 0) ||
(byValue & TMCTL_TSUSP)) {
- VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
+ iowrite8(0, io_base + MAC_REG_TMCTL0);
return;
}
}
}
- VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
+ iowrite8(0, io_base + MAC_REG_TMCTL0);
}
/*
*
* Parameters:
* In:
- * dwIoBase - Base Address for MAC
+ * io_base - Base Address for MAC
* uDelay - Delay time
* Out:
* none
* Return Value: none
*
*/
-void MACvOneShotTimer1MicroSec(void __iomem *dwIoBase, unsigned int uDelayTime)
+void MACvOneShotTimer1MicroSec(struct vnt_private *priv, unsigned int uDelayTime)
{
- VNSvOutPortB(dwIoBase + MAC_REG_TMCTL1, 0);
- VNSvOutPortD(dwIoBase + MAC_REG_TMDATA1, uDelayTime);
- VNSvOutPortB(dwIoBase + MAC_REG_TMCTL1, (TMCTL_TMD | TMCTL_TE));
+ void __iomem *io_base = priv->PortOffset;
+
+ iowrite8(0, io_base + MAC_REG_TMCTL1);
+ iowrite32(uDelayTime, io_base + MAC_REG_TMDATA1);
+ iowrite8((TMCTL_TMD | TMCTL_TE), io_base + MAC_REG_TMCTL1);
}
-void MACvSetMISCFifo(void __iomem *dwIoBase, unsigned short wOffset,
- unsigned long dwData)
+void MACvSetMISCFifo(struct vnt_private *priv, unsigned short offset,
+ u32 data)
{
- if (wOffset > 273)
+ void __iomem *io_base = priv->PortOffset;
+
+ if (offset > 273)
return;
- VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
- VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
- VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
+ iowrite16(offset, io_base + MAC_REG_MISCFFNDEX);
+ iowrite32(data, io_base + MAC_REG_MISCFFDATA);
+ iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL);
}
-bool MACbPSWakeup(void __iomem *dwIoBase)
+bool MACbPSWakeup(struct vnt_private *priv)
{
- unsigned char byOrgValue;
+ void __iomem *io_base = priv->PortOffset;
unsigned int ww;
/* Read PSCTL */
- if (MACbIsRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PS))
+ if (MACbIsRegBitsOff(priv, MAC_REG_PSCTL, PSCTL_PS))
return true;
/* Disable PS */
- MACvRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PSEN);
+ MACvRegBitsOff(io_base, MAC_REG_PSCTL, PSCTL_PSEN);
/* Check if SyncFlushOK */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
- VNSvInPortB(dwIoBase + MAC_REG_PSCTL, &byOrgValue);
- if (byOrgValue & PSCTL_WAKEDONE)
+ if (ioread8(io_base + MAC_REG_PSCTL) & PSCTL_WAKEDONE)
break;
}
if (ww == W_MAX_TIMEOUT) {
*
* Parameters:
* In:
- * dwIoBase - Base Address for MAC
+ * io_base - Base Address for MAC
*
* Out:
* none
*
*/
-void MACvSetKeyEntry(void __iomem *dwIoBase, unsigned short wKeyCtl,
+void MACvSetKeyEntry(struct vnt_private *priv, unsigned short wKeyCtl,
unsigned int uEntryIdx, unsigned int uKeyIdx,
unsigned char *pbyAddr, u32 *pdwKey,
unsigned char byLocalID)
{
- unsigned short wOffset;
- u32 dwData;
+ void __iomem *io_base = priv->PortOffset;
+ unsigned short offset;
+ u32 data;
int ii;
if (byLocalID <= 1)
return;
pr_debug("MACvSetKeyEntry\n");
- wOffset = MISCFIFO_KEYETRY0;
- wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
-
- dwData = 0;
- dwData |= wKeyCtl;
- dwData <<= 16;
- dwData |= MAKEWORD(*(pbyAddr+4), *(pbyAddr+5));
- pr_debug("1. wOffset: %d, Data: %X, KeyCtl:%X\n",
- wOffset, dwData, wKeyCtl);
-
- VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
- VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
- VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
- wOffset++;
-
- dwData = 0;
- dwData |= *(pbyAddr+3);
- dwData <<= 8;
- dwData |= *(pbyAddr+2);
- dwData <<= 8;
- dwData |= *(pbyAddr+1);
- dwData <<= 8;
- dwData |= *(pbyAddr+0);
- pr_debug("2. wOffset: %d, Data: %X\n", wOffset, dwData);
-
- VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
- VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
- VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
- wOffset++;
-
- wOffset += (uKeyIdx * 4);
+ offset = MISCFIFO_KEYETRY0;
+ offset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
+
+ data = 0;
+ data |= wKeyCtl;
+ data <<= 16;
+ data |= MAKEWORD(*(pbyAddr + 4), *(pbyAddr + 5));
+ pr_debug("1. offset: %d, Data: %X, KeyCtl:%X\n",
+ offset, data, wKeyCtl);
+
+ iowrite16(offset, io_base + MAC_REG_MISCFFNDEX);
+ iowrite32(data, io_base + MAC_REG_MISCFFDATA);
+ iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL);
+ offset++;
+
+ data = 0;
+ data |= *(pbyAddr + 3);
+ data <<= 8;
+ data |= *(pbyAddr + 2);
+ data <<= 8;
+ data |= *(pbyAddr + 1);
+ data <<= 8;
+ data |= *pbyAddr;
+ pr_debug("2. offset: %d, Data: %X\n", offset, data);
+
+ iowrite16(offset, io_base + MAC_REG_MISCFFNDEX);
+ iowrite32(data, io_base + MAC_REG_MISCFFDATA);
+ iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL);
+ offset++;
+
+ offset += (uKeyIdx * 4);
for (ii = 0; ii < 4; ii++) {
/* always push 128 bits */
- pr_debug("3.(%d) wOffset: %d, Data: %X\n",
- ii, wOffset+ii, *pdwKey);
- VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii);
- VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, *pdwKey++);
- VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
+ pr_debug("3.(%d) offset: %d, Data: %X\n",
+ ii, offset + ii, *pdwKey);
+ iowrite16(offset + ii, io_base + MAC_REG_MISCFFNDEX);
+ iowrite32(*pdwKey++, io_base + MAC_REG_MISCFFDATA);
+ iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL);
}
}
*
* Parameters:
* In:
- * dwIoBase - Base Address for MAC
+ * io_base - Base Address for MAC
*
* Out:
* none
* Return Value: none
*
*/
-void MACvDisableKeyEntry(void __iomem *dwIoBase, unsigned int uEntryIdx)
+void MACvDisableKeyEntry(struct vnt_private *priv, unsigned int uEntryIdx)
{
- unsigned short wOffset;
+ void __iomem *io_base = priv->PortOffset;
+ unsigned short offset;
- wOffset = MISCFIFO_KEYETRY0;
- wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
+ offset = MISCFIFO_KEYETRY0;
+ offset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
- VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
- VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, 0);
- VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
+ iowrite16(offset, io_base + MAC_REG_MISCFFNDEX);
+ iowrite32(0, io_base + MAC_REG_MISCFFDATA);
+ iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL);
}
projects / cascardo / linux.git / blobdiff