Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input

[cascardo/linux.git] / drivers / usb / dwc3 / core.h

diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index b417506..b69d322 100644 (file)
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -154,8 +154,9 @@
 /* OTG Registers */
 #define DWC3_OCFG              0xcc00
 #define DWC3_OCTL              0xcc04
-#define DWC3_OEVTEN            0xcc08
-#define DWC3_OSTS              0xcc0C
+#define DWC3_OEVT              0xcc08
+#define DWC3_OEVTEN            0xcc0C
+#define DWC3_OSTS              0xcc10
 
 /* Bit fields */
 
@@ -369,6 +370,9 @@ struct dwc3_trb;
  * @list: a list of event buffers
  * @buf: _THE_ buffer
  * @length: size of this buffer
+ * @lpos: event offset
+ * @count: cache of last read event count register
+ * @flags: flags related to this event buffer
  * @dma: dma_addr_t
  * @dwc: pointer to DWC controller
  */
@@ -376,6 +380,10 @@ struct dwc3_event_buffer {
        void                    *buf;
        unsigned                length;
        unsigned int            lpos;
+       unsigned int            count;
+       unsigned int            flags;
+
+#define DWC3_EVENT_PENDING     BIT(0)
 
        dma_addr_t              dma;
 
@@ -487,12 +495,6 @@ enum dwc3_link_state {
        DWC3_LINK_STATE_MASK            = 0x0f,
 };
 
-enum dwc3_device_state {
-       DWC3_DEFAULT_STATE,
-       DWC3_ADDRESS_STATE,
-       DWC3_CONFIGURED_STATE,
-};
-
 /* TRB Length, PCM and Status */
 #define DWC3_TRB_SIZE_MASK     (0x00ffffff)
 #define DWC3_TRB_SIZE_LENGTH(n)        ((n) & DWC3_TRB_SIZE_MASK)
@@ -574,6 +576,14 @@ struct dwc3_hwparams {
 /* HWPARAMS1 */
 #define DWC3_NUM_INT(n)                (((n) & (0x3f << 15)) >> 15)
 
+/* HWPARAMS3 */
+#define DWC3_NUM_IN_EPS_MASK   (0x1f << 18)
+#define DWC3_NUM_EPS_MASK      (0x3f << 12)
+#define DWC3_NUM_EPS(p)                (((p)->hwparams3 &              \
+                       (DWC3_NUM_EPS_MASK)) >> 12)
+#define DWC3_NUM_IN_EPS(p)     (((p)->hwparams3 &              \
+                       (DWC3_NUM_IN_EPS_MASK)) >> 18)
+
 /* HWPARAMS7 */
 #define DWC3_RAM1_DEPTH(n)     ((n) & 0xffff)
 
@@ -618,7 +628,6 @@ struct dwc3_scratchpad_array {
  * @gadget_driver: pointer to the gadget driver
  * @regs: base address for our registers
  * @regs_size: address space size
- * @irq: IRQ number
  * @num_event_buffers: calculated number of event buffers
  * @u1u2: only used on revisions <1.83a for workaround
  * @maximum_speed: maximum speed requested (mainly for testing purposes)
@@ -626,6 +635,8 @@ struct dwc3_scratchpad_array {
  * @mode: mode of operation
  * @usb2_phy: pointer to USB2 PHY
  * @usb3_phy: pointer to USB3 PHY
+ * @dcfg: saved contents of DCFG register
+ * @gctl: saved contents of GCTL register
  * @is_selfpowered: true when we are selfpowered
  * @three_stage_setup: set if we perform a three phase setup
  * @ep0_bounced: true when we used bounce buffer
@@ -639,6 +650,8 @@ struct dwc3_scratchpad_array {
  * @u2pel: parameter from Set SEL request.
  * @u1sel: parameter from Set SEL request.
  * @u1pel: parameter from Set SEL request.
+ * @num_out_eps: number of out endpoints
+ * @num_in_eps: number of in endpoints
  * @ep0_next_event: hold the next expected event
  * @ep0state: state of endpoint zero
  * @link_state: link state
@@ -656,8 +669,10 @@ struct dwc3 {
        dma_addr_t              ep0_trb_addr;
        dma_addr_t              ep0_bounce_addr;
        struct dwc3_request     ep0_usb_req;
+
        /* device lock */
        spinlock_t              lock;
+
        struct device           *dev;
 
        struct platform_device  *xhci;
@@ -675,6 +690,10 @@ struct dwc3 {
        void __iomem            *regs;
        size_t                  regs_size;
 
+       /* used for suspend/resume */
+       u32                     dcfg;
+       u32                     gctl;
+
        u32                     num_event_buffers;
        u32                     u1u2;
        u32                     maximum_speed;
@@ -694,6 +713,9 @@ struct dwc3 {
 #define DWC3_REVISION_202A     0x5533202a
 #define DWC3_REVISION_210A     0x5533210a
 #define DWC3_REVISION_220A     0x5533220a
+#define DWC3_REVISION_230A     0x5533230a
+#define DWC3_REVISION_240A     0x5533240a
+#define DWC3_REVISION_250A     0x5533250a
 
        unsigned                is_selfpowered:1;
        unsigned                three_stage_setup:1;
@@ -704,11 +726,11 @@ struct dwc3 {
        unsigned                delayed_status:1;
        unsigned                needs_fifo_resize:1;
        unsigned                resize_fifos:1;
+       unsigned                pullups_connected:1;
 
        enum dwc3_ep0_next      ep0_next_event;
        enum dwc3_ep0_state     ep0state;
        enum dwc3_link_state    link_state;
-       enum dwc3_device_state  dev_state;
 
        u16                     isoch_delay;
        u16                     u2sel;
@@ -718,6 +740,9 @@ struct dwc3 {
 
        u8                      speed;
 
+       u8                      num_out_eps;
+       u8                      num_in_eps;
+
        void                    *mem;
 
        struct dwc3_hwparams    hwparams;
@@ -884,4 +909,31 @@ static inline void dwc3_gadget_exit(struct dwc3 *dwc)
 { }
 #endif
 
+/* power management interface */
+#if !IS_ENABLED(CONFIG_USB_DWC3_HOST)
+int dwc3_gadget_prepare(struct dwc3 *dwc);
+void dwc3_gadget_complete(struct dwc3 *dwc);
+int dwc3_gadget_suspend(struct dwc3 *dwc);
+int dwc3_gadget_resume(struct dwc3 *dwc);
+#else
+static inline int dwc3_gadget_prepare(struct dwc3 *dwc)
+{
+       return 0;
+}
+
+static inline void dwc3_gadget_complete(struct dwc3 *dwc)
+{
+}
+
+static inline int dwc3_gadget_suspend(struct dwc3 *dwc)
+{
+       return 0;
+}
+
+static inline int dwc3_gadget_resume(struct dwc3 *dwc)
+{
+       return 0;
+}
+#endif /* !IS_ENABLED(CONFIG_USB_DWC3_HOST) */
+
 #endif /* __DRIVERS_USB_DWC3_CORE_H */