Auto-update from upstream

[cascardo/linux.git] / include / asm-mips / mipsregs.h

diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h
index 89aac1e..80370e0 100644 (file)
--- a/include/asm-mips/mipsregs.h
+++ b/include/asm-mips/mipsregs.h
@@ -37,8 +37,6 @@
 #define _ULCAST_ (unsigned long)
 #endif
 
-#include <asm/mipsmtregs.h>
-
 /*
  * Coprocessor 0 register names
  */
@@ -528,6 +526,7 @@
 
 #define MIPS_CONF3_TL          (_ULCAST_(1) <<  0)
 #define MIPS_CONF3_SM          (_ULCAST_(1) <<  1)
+#define MIPS_CONF3_MT          (_ULCAST_(1) <<  2)
 #define MIPS_CONF3_SP          (_ULCAST_(1) <<  4)
 #define MIPS_CONF3_VINT                (_ULCAST_(1) <<  5)
 #define MIPS_CONF3_VEIC                (_ULCAST_(1) <<  6)
@@ -692,13 +691,13 @@ do {                                                                      \
        if (sel == 0)                                                   \
                __asm__ __volatile__(                                   \
                        "mtc0\t%z0, " #register "\n\t"                  \
-                       : : "Jr" ((unsigned int)value));                \
+                       : : "Jr" ((unsigned int)(value)));              \
        else                                                            \
                __asm__ __volatile__(                                   \
                        ".set\tmips32\n\t"                              \
                        "mtc0\t%z0, " #register ", " #sel "\n\t"        \
                        ".set\tmips0"                                   \
-                       : : "Jr" ((unsigned int)value));                \
+                       : : "Jr" ((unsigned int)(value)));              \
 } while (0)
 
 #define __write_64bit_c0_register(register, sel, value)                        \
@@ -747,7 +746,7 @@ do {                                                                        \
 do {                                                                   \
        __asm__ __volatile__(                                           \
                "ctc0\t%z0, " #register "\n\t"                          \
-               : : "Jr" ((unsigned int)value));                        \
+               : : "Jr" ((unsigned int)(value)));                      \
 } while (0)
 
 /*
@@ -840,12 +839,24 @@ do {                                                                      \
 #define read_c0_count()                __read_32bit_c0_register($9, 0)
 #define write_c0_count(val)    __write_32bit_c0_register($9, 0, val)
 
+#define read_c0_count2()       __read_32bit_c0_register($9, 6) /* pnx8550 */
+#define write_c0_count2(val)   __write_32bit_c0_register($9, 6, val)
+
+#define read_c0_count3()       __read_32bit_c0_register($9, 7) /* pnx8550 */
+#define write_c0_count3(val)   __write_32bit_c0_register($9, 7, val)
+
 #define read_c0_entryhi()      __read_ulong_c0_register($10, 0)
 #define write_c0_entryhi(val)  __write_ulong_c0_register($10, 0, val)
 
 #define read_c0_compare()      __read_32bit_c0_register($11, 0)
 #define write_c0_compare(val)  __write_32bit_c0_register($11, 0, val)
 
+#define read_c0_compare2()     __read_32bit_c0_register($11, 6) /* pnx8550 */
+#define write_c0_compare2(val) __write_32bit_c0_register($11, 6, val)
+
+#define read_c0_compare3()     __read_32bit_c0_register($11, 7) /* pnx8550 */
+#define write_c0_compare3(val) __write_32bit_c0_register($11, 7, val)
+
 #define read_c0_status()       __read_32bit_c0_register($12, 0)
 #define write_c0_status(val)   __write_32bit_c0_register($12, 0, val)