net/mlx4: Change QP allocation scheme

[cascardo/linux.git] / include / linux / mlx4 / device.h

diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h
index 3d9bff0..272aa25 100644 (file)
--- a/include/linux/mlx4/device.h
+++ b/include/linux/mlx4/device.h
@@ -95,7 +95,7 @@ enum {
 
 enum {
        MLX4_MAX_NUM_PF         = 16,
-       MLX4_MAX_NUM_VF         = 64,
+       MLX4_MAX_NUM_VF         = 126,
        MLX4_MAX_NUM_VF_P_PORT  = 64,
        MLX4_MFUNC_MAX          = 80,
        MLX4_MAX_EQ_NUM         = 1024,
@@ -189,7 +189,25 @@ enum {
        MLX4_DEV_CAP_FLAG2_EQE_STRIDE           = 1LL <<  13,
        MLX4_DEV_CAP_FLAG2_ETH_PROT_CTRL        = 1LL <<  14,
        MLX4_DEV_CAP_FLAG2_ETH_BACKPL_AN_REP    = 1LL <<  15,
-       MLX4_DEV_CAP_FLAG2_CONFIG_DEV           = 1LL <<  16
+       MLX4_DEV_CAP_FLAG2_CONFIG_DEV           = 1LL <<  16,
+       MLX4_DEV_CAP_FLAG2_SYS_EQS              = 1LL <<  17,
+       MLX4_DEV_CAP_FLAG2_80_VFS               = 1LL <<  18
+};
+
+enum {
+       MLX4_QUERY_FUNC_FLAGS_BF_RES_QP         = 1LL << 0
+};
+
+/* bit enums for an 8-bit flags field indicating special use
+ * QPs which require special handling in qp_reserve_range.
+ * Currently, this only includes QPs used by the ETH interface,
+ * where we expect to use blueflame.  These QPs must not have
+ * bits 6 and 7 set in their qp number.
+ *
+ * This enum may use only bits 0..7.
+ */
+enum {
+       MLX4_RESERVE_ETH_BF_QP  = 1 << 7,
 };
 
 enum {
@@ -443,6 +461,7 @@ struct mlx4_caps {
        int                     num_cqs;
        int                     max_cqes;
        int                     reserved_cqs;
+       int                     num_sys_eqs;
        int                     num_eqs;
        int                     reserved_eqs;
        int                     num_comp_vectors;
@@ -498,6 +517,7 @@ struct mlx4_caps {
        u64                     phys_port_id[MLX4_MAX_PORTS + 1];
        int                     tunnel_offload_mode;
        u8                      rx_checksum_flags_port[MLX4_MAX_PORTS + 1];
+       u8                      alloc_res_qp_mask;
 };
 
 struct mlx4_buf_list {
@@ -618,6 +638,11 @@ struct mlx4_cq {
 
        atomic_t                refcount;
        struct completion       free;
+       struct {
+               struct list_head list;
+               void (*comp)(struct mlx4_cq *);
+               void            *priv;
+       } tasklet_ctx;
 };
 
 struct mlx4_qp {
@@ -942,8 +967,8 @@ int mlx4_cq_alloc(struct mlx4_dev *dev, int nent, struct mlx4_mtt *mtt,
                  struct mlx4_uar *uar, u64 db_rec, struct mlx4_cq *cq,
                  unsigned vector, int collapsed, int timestamp_en);
 void mlx4_cq_free(struct mlx4_dev *dev, struct mlx4_cq *cq);
-
-int mlx4_qp_reserve_range(struct mlx4_dev *dev, int cnt, int align, int *base);
+int mlx4_qp_reserve_range(struct mlx4_dev *dev, int cnt, int align,
+                         int *base, u8 flags);
 void mlx4_qp_release_range(struct mlx4_dev *dev, int base_qpn, int cnt);
 
 int mlx4_qp_alloc(struct mlx4_dev *dev, int qpn, struct mlx4_qp *qp,