net/mlx5: EQ commands via mlx5 ifc

[cascardo/linux.git] / include / linux / mlx5 / device.h

diff --git a/include/linux/mlx5/device.h b/include/linux/mlx5/device.h
index 0b6d15c..c84e0ba 100644 (file)
--- a/include/linux/mlx5/device.h
+++ b/include/linux/mlx5/device.h
@@ -455,30 +455,6 @@ struct mlx5_odp_caps {
        char reserved2[0xe4];
 };
 
-struct mlx5_cmd_init_hca_mbox_in {
-       struct mlx5_inbox_hdr   hdr;
-       u8                      rsvd0[2];
-       __be16                  profile;
-       u8                      rsvd1[4];
-};
-
-struct mlx5_cmd_init_hca_mbox_out {
-       struct mlx5_outbox_hdr  hdr;
-       u8                      rsvd[8];
-};
-
-struct mlx5_cmd_teardown_hca_mbox_in {
-       struct mlx5_inbox_hdr   hdr;
-       u8                      rsvd0[2];
-       __be16                  profile;
-       u8                      rsvd1[4];
-};
-
-struct mlx5_cmd_teardown_hca_mbox_out {
-       struct mlx5_outbox_hdr  hdr;
-       u8                      rsvd[8];
-};
-
 struct mlx5_cmd_layout {
        u8              type;
        u8              rsvd0[3];
@@ -1019,80 +995,6 @@ struct mlx5_disable_hca_mbox_out {
        u8                      rsvd[8];
 };
 
-struct mlx5_eq_context {
-       u8                      status;
-       u8                      ec_oi;
-       u8                      st;
-       u8                      rsvd2[7];
-       __be16                  page_pffset;
-       __be32                  log_sz_usr_page;
-       u8                      rsvd3[7];
-       u8                      intr;
-       u8                      log_page_size;
-       u8                      rsvd4[15];
-       __be32                  consumer_counter;
-       __be32                  produser_counter;
-       u8                      rsvd5[16];
-};
-
-struct mlx5_create_eq_mbox_in {
-       struct mlx5_inbox_hdr   hdr;
-       u8                      rsvd0[3];
-       u8                      input_eqn;
-       u8                      rsvd1[4];
-       struct mlx5_eq_context  ctx;
-       u8                      rsvd2[8];
-       __be64                  events_mask;
-       u8                      rsvd3[176];
-       __be64                  pas[0];
-};
-
-struct mlx5_create_eq_mbox_out {
-       struct mlx5_outbox_hdr  hdr;
-       u8                      rsvd0[3];
-       u8                      eq_number;
-       u8                      rsvd1[4];
-};
-
-struct mlx5_destroy_eq_mbox_in {
-       struct mlx5_inbox_hdr   hdr;
-       u8                      rsvd0[3];
-       u8                      eqn;
-       u8                      rsvd1[4];
-};
-
-struct mlx5_destroy_eq_mbox_out {
-       struct mlx5_outbox_hdr  hdr;
-       u8                      rsvd[8];
-};
-
-struct mlx5_map_eq_mbox_in {
-       struct mlx5_inbox_hdr   hdr;
-       __be64                  mask;
-       u8                      mu;
-       u8                      rsvd0[2];
-       u8                      eqn;
-       u8                      rsvd1[24];
-};
-
-struct mlx5_map_eq_mbox_out {
-       struct mlx5_outbox_hdr  hdr;
-       u8                      rsvd[8];
-};
-
-struct mlx5_query_eq_mbox_in {
-       struct mlx5_inbox_hdr   hdr;
-       u8                      rsvd0[3];
-       u8                      eqn;
-       u8                      rsvd1[4];
-};
-
-struct mlx5_query_eq_mbox_out {
-       struct mlx5_outbox_hdr  hdr;
-       u8                      rsvd[8];
-       struct mlx5_eq_context  ctx;
-};
-
 enum {
        MLX5_MKEY_STATUS_FREE = 1 << 6,
 };
@@ -1189,35 +1091,6 @@ struct mlx5_dump_mkey_mbox_out {
        __be32                  mkey;
 };
 
-struct mlx5_mad_ifc_mbox_in {
-       struct mlx5_inbox_hdr   hdr;
-       __be16                  remote_lid;
-       u8                      rsvd0;
-       u8                      port;
-       u8                      rsvd1[4];
-       u8                      data[256];
-};
-
-struct mlx5_mad_ifc_mbox_out {
-       struct mlx5_outbox_hdr  hdr;
-       u8                      rsvd[8];
-       u8                      data[256];
-};
-
-struct mlx5_access_reg_mbox_in {
-       struct mlx5_inbox_hdr           hdr;
-       u8                              rsvd0[2];
-       __be16                          register_id;
-       __be32                          arg;
-       __be32                          data[0];
-};
-
-struct mlx5_access_reg_mbox_out {
-       struct mlx5_outbox_hdr          hdr;
-       u8                              rsvd[8];
-       __be32                          data[0];
-};
-
 #define MLX5_ATTR_EXTENDED_PORT_INFO   cpu_to_be16(0xff90)
 
 enum {