net/mlx5: E-Switch, Add SR-IOV (FDB) support

[cascardo/linux.git] / include / linux / mlx5 / mlx5_ifc.h

diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 2728b5f..a81b008 100644 (file)
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -447,6 +447,18 @@ struct mlx5_ifc_flow_table_nic_cap_bits {
        u8         reserved_3[0x7200];
 };
 
+struct mlx5_ifc_flow_table_eswitch_cap_bits {
+       u8     reserved_0[0x200];
+
+       struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
+
+       struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
+
+       struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
+
+       u8      reserved_1[0x7800];
+};
+
 struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
        u8         csum_cap[0x1];
        u8         vlan_cap[0x1];
@@ -815,9 +827,10 @@ struct mlx5_ifc_cmd_hca_cap_bits {
        u8         reserved_69[0x220];
 };
 
-enum {
-       MLX5_DEST_FORMAT_STRUCT_DESTINATION_TYPE_FLOW_TABLE_  = 0x1,
-       MLX5_DEST_FORMAT_STRUCT_DESTINATION_TYPE_TIR          = 0x2,
+enum mlx5_flow_destination_type {
+       MLX5_FLOW_DESTINATION_TYPE_VPORT        = 0x0,
+       MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE   = 0x1,
+       MLX5_FLOW_DESTINATION_TYPE_TIR          = 0x2,
 };
 
 struct mlx5_ifc_dest_format_struct_bits {
@@ -910,6 +923,13 @@ struct mlx5_ifc_mac_address_layout_bits {
        u8         mac_addr_31_0[0x20];
 };
 
+struct mlx5_ifc_vlan_layout_bits {
+       u8         reserved_0[0x14];
+       u8         vlan[0x0c];
+
+       u8         reserved_1[0x20];
+};
+
 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
        u8         reserved_0[0xa0];
 
@@ -1839,6 +1859,7 @@ union mlx5_ifc_hca_cap_union_bits {
        struct mlx5_ifc_roce_cap_bits roce_cap;
        struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
        struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
+       struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
        u8         reserved_0[0x8000];
 };