dpif-netlink: add GENEVE creation support

[cascardo/ovs.git] / lib / ovs-atomic-gcc4.7+.h

diff --git a/lib/ovs-atomic-gcc4.7+.h b/lib/ovs-atomic-gcc4.7+.h
index 99c6b1f..4c197eb 100644 (file)
--- a/lib/ovs-atomic-gcc4.7+.h
+++ b/lib/ovs-atomic-gcc4.7+.h
@@ -32,7 +32,6 @@ typedef enum {
 
 #define ATOMIC_VAR_INIT(VALUE) (VALUE)
 #define atomic_init(OBJECT, VALUE) (*(OBJECT) = (VALUE), (void) 0)
-#define atomic_destroy(OBJECT) ((void) (OBJECT))
 
 #define atomic_thread_fence __atomic_thread_fence
 #define atomic_signal_fence __atomic_signal_fence
@@ -48,6 +47,20 @@ typedef enum {
     (*(DST) = __atomic_load_n(SRC, ORDER),      \
      (void) 0)
 
+#define atomic_compare_exchange_strong(DST, EXP, SRC)              \
+    atomic_compare_exchange_strong_explicit(DST, EXP, SRC,         \
+                                            memory_order_seq_cst,  \
+                                            memory_order_seq_cst)
+#define atomic_compare_exchange_strong_explicit(DST, EXP, SRC, ORD1, ORD2) \
+    __atomic_compare_exchange_n(DST, EXP, SRC, false, ORD1, ORD2)
+
+#define atomic_compare_exchange_weak(DST, EXP, SRC)              \
+    atomic_compare_exchange_weak_explicit(DST, EXP, SRC,         \
+                                          memory_order_seq_cst,  \
+                                          memory_order_seq_cst)
+#define atomic_compare_exchange_weak_explicit(DST, EXP, SRC, ORD1, ORD2) \
+    __atomic_compare_exchange_n(DST, EXP, SRC, true, ORD1, ORD2)
+
 #define atomic_add(RMW, OPERAND, ORIG) \
         atomic_add_explicit(RMW, OPERAND, ORIG, memory_order_seq_cst)
 #define atomic_sub(RMW, OPERAND, ORIG) \