Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next
[cascardo/linux.git] / sound / pci / echoaudio / echoaudio_3g.c
index 658db44..2fa66dc 100644 (file)
@@ -51,7 +51,7 @@ static int check_asic_status(struct echoaudio *chip)
        }
 
        box_status = le32_to_cpu(chip->comm_page->ext_box_status);
-       DE_INIT(("box_status=%x\n", box_status));
+       dev_dbg(chip->card->dev, "box_status=%x\n", box_status);
        if (box_status == E3G_ASIC_NOT_LOADED)
                return -ENODEV;
 
@@ -76,7 +76,8 @@ static int write_control_reg(struct echoaudio *chip, u32 ctl, u32 frq,
        if (wait_handshake(chip))
                return -EIO;
 
-       DE_ACT(("WriteControlReg: Setting 0x%x, 0x%x\n", ctl, frq));
+       dev_dbg(chip->card->dev,
+               "WriteControlReg: Setting 0x%x, 0x%x\n", ctl, frq);
 
        ctl = cpu_to_le32(ctl);
        frq = cpu_to_le32(frq);
@@ -89,7 +90,7 @@ static int write_control_reg(struct echoaudio *chip, u32 ctl, u32 frq,
                return send_vector(chip, DSP_VC_WRITE_CONTROL_REG);
        }
 
-       DE_ACT(("WriteControlReg: not written, no change\n"));
+       dev_dbg(chip->card->dev, "WriteControlReg: not written, no change\n");
        return 0;
 }
 
@@ -258,8 +259,8 @@ static int set_sample_rate(struct echoaudio *chip, u32 rate)
 
        /* Only set the clock for internal mode. */
        if (chip->input_clock != ECHO_CLOCK_INTERNAL) {
-               DE_ACT(("set_sample_rate: Cannot set sample rate - "
-                       "clock not set to CLK_CLOCKININTERNAL\n"));
+               dev_warn(chip->card->dev,
+                        "Cannot set sample rate - clock not set to CLK_CLOCKININTERNAL\n");
                /* Save the rate anyhow */
                chip->comm_page->sample_rate = cpu_to_le32(rate);
                chip->sample_rate = rate;
@@ -313,7 +314,8 @@ static int set_sample_rate(struct echoaudio *chip, u32 rate)
 
        chip->comm_page->sample_rate = cpu_to_le32(rate);       /* ignored by the DSP */
        chip->sample_rate = rate;
-       DE_ACT(("SetSampleRate: %d clock %x\n", rate, control_reg));
+       dev_dbg(chip->card->dev,
+               "SetSampleRate: %d clock %x\n", rate, control_reg);
 
        /* Tell the DSP about it - DSP reads both control reg & freq reg */
        return write_control_reg(chip, control_reg, frq_reg, 0);
@@ -326,7 +328,6 @@ static int set_input_clock(struct echoaudio *chip, u16 clock)
 {
        u32 control_reg, clocks_from_dsp;
 
-       DE_ACT(("set_input_clock:\n"));
 
        /* Mask off the clock select bits */
        control_reg = le32_to_cpu(chip->comm_page->control_register) &
@@ -335,13 +336,11 @@ static int set_input_clock(struct echoaudio *chip, u16 clock)
 
        switch (clock) {
        case ECHO_CLOCK_INTERNAL:
-               DE_ACT(("Set Echo3G clock to INTERNAL\n"));
                chip->input_clock = ECHO_CLOCK_INTERNAL;
                return set_sample_rate(chip, chip->sample_rate);
        case ECHO_CLOCK_SPDIF:
                if (chip->digital_mode == DIGITAL_MODE_ADAT)
                        return -EAGAIN;
-               DE_ACT(("Set Echo3G clock to SPDIF\n"));
                control_reg |= E3G_SPDIF_CLOCK;
                if (clocks_from_dsp & E3G_CLOCK_DETECT_BIT_SPDIF96)
                        control_reg |= E3G_DOUBLE_SPEED_MODE;
@@ -351,12 +350,10 @@ static int set_input_clock(struct echoaudio *chip, u16 clock)
        case ECHO_CLOCK_ADAT:
                if (chip->digital_mode != DIGITAL_MODE_ADAT)
                        return -EAGAIN;
-               DE_ACT(("Set Echo3G clock to ADAT\n"));
                control_reg |= E3G_ADAT_CLOCK;
                control_reg &= ~E3G_DOUBLE_SPEED_MODE;
                break;
        case ECHO_CLOCK_WORD:
-               DE_ACT(("Set Echo3G clock to WORD\n"));
                control_reg |= E3G_WORD_CLOCK;
                if (clocks_from_dsp & E3G_CLOCK_DETECT_BIT_WORD96)
                        control_reg |= E3G_DOUBLE_SPEED_MODE;
@@ -364,7 +361,8 @@ static int set_input_clock(struct echoaudio *chip, u16 clock)
                        control_reg &= ~E3G_DOUBLE_SPEED_MODE;
                break;
        default:
-               DE_ACT(("Input clock 0x%x not supported for Echo3G\n", clock));
+               dev_err(chip->card->dev,
+                       "Input clock 0x%x not supported for Echo3G\n", clock);
                return -EINVAL;
        }
 
@@ -392,7 +390,8 @@ static int dsp_set_digital_mode(struct echoaudio *chip, u8 mode)
                        incompatible_clock = TRUE;
                break;
        default:
-               DE_ACT(("Digital mode not supported: %d\n", mode));
+               dev_err(chip->card->dev,
+                       "Digital mode not supported: %d\n", mode);
                return -EINVAL;
        }
 
@@ -427,6 +426,6 @@ static int dsp_set_digital_mode(struct echoaudio *chip, u8 mode)
                return err;
        chip->digital_mode = mode;
 
-       DE_ACT(("set_digital_mode(%d)\n", chip->digital_mode));
+       dev_dbg(chip->card->dev, "set_digital_mode(%d)\n", chip->digital_mode);
        return incompatible_clock;
 }