sparc64: Support 2GB and 16GB page sizes for kernel linear mappings.
authorDavid S. Miller <davem@davemloft.net>
Fri, 7 Sep 2012 01:13:58 +0000 (18:13 -0700)
committerDavid S. Miller <davem@davemloft.net>
Fri, 7 Sep 2012 01:13:58 +0000 (18:13 -0700)
commit4f93d21d2563353df813ee049f6489f340389aab
treed12bf9282a121c9a326bce958bdc9736b005f5cc
parent699871bc943be418be13208526bc613d68017fab
sparc64: Support 2GB and 16GB page sizes for kernel linear mappings.

SPARC-T4 supports 2GB pages.

So convert kpte_linear_bitmap into an array of 2-bit values which
index into kern_linear_pte_xor.

Now kern_linear_pte_xor is used for 4 page size aligned regions,
4MB, 256MB, 2GB, and 16GB respectively.

Enabling 2GB pages is currently hardcoded using a check against
sun4v_chip_type.  In the future this will be done more cleanly
by interrogating the machine description which is the correct
way to determine this kind of thing.

Signed-off-by: David S. Miller <davem@davemloft.net>
arch/sparc/kernel/ktlb.S
arch/sparc/mm/init_64.c
arch/sparc/mm/init_64.h