cpufreq: imx6q: correct VDDSOC/PU voltage scaling when cpufreq is changed
authorAnson Huang <b20788@freescale.com>
Thu, 19 Dec 2013 14:16:47 +0000 (09:16 -0500)
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>
Mon, 6 Jan 2014 12:33:45 +0000 (13:33 +0100)
commitb4573d1d657aae28bedf3a9a1f5367e09c80d1d6
tree07314dfeeada2c88b04a0f03f30b4ef0cebc25bd
parentab1b1c4e8223f9ee66aa93aaf64c36e77cadffac
cpufreq: imx6q: correct VDDSOC/PU voltage scaling when cpufreq is changed

on i.MX6Q, cpu freq change need to follow below flows:

1. each setpoint has different VDDARM, VDDSOC/PU voltage, get the setpoint
   table from dts;
2. when cpu freq is scaling up, need to increase VDDSOC/PU voltage before
   VDDARM, if VDDPU is off, no need to change it;
3. when cpu freq is scaling down, need to decrease VDDARM voltage before
   VDDSOC/PU, if VDDPU is off, no need to change it;

normally dts will pass vddsoc/pu freq/volt info to kernel, if not, will
use fixed value for vddsoc/pu voltage setting.

Signed-off-by: Anson Huang <b20788@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
drivers/cpufreq/imx6q-cpufreq.c