clk: sunxi: Register divs clocks before factor clocks
authorChen-Yu Tsai <wens@csie.org>
Thu, 19 Mar 2015 17:19:05 +0000 (01:19 +0800)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Sat, 21 Mar 2015 10:49:57 +0000 (11:49 +0100)
commitb712a623bd5c3b04b005e757945d43441e0aa4a8
treeebea11bbb1251ff2f6fd4f4dde26ddf948ad63f4
parent946fd40f2860bca61abb51676cf72b31ca79d3f8
clk: sunxi: Register divs clocks before factor clocks

We want to reparent AHB clock to PLL6 on sun5i/sun7i using the assigned
clocks properties. AHB is a factor clock, while PLL6 is a divs clock.

Register divs clocks before factor clocks so reparenting works. This
is only needed because we do the reparenting on the clock provider.

The proper way to fix this is to split out all the old sunxi clocks
into separate CLK_OF_DECLARE statements, like we are doing for sun9i.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
drivers/clk/sunxi/clk-sunxi.c