ASoC: McASP: Fix receive clock polarity in DAIFMT_NB_NF mode.
authorMarek Belisko <marek.belisko@gmail.com>
Fri, 3 May 2013 05:37:36 +0000 (07:37 +0200)
committerMark Brown <broonie@opensource.wolfsonmicro.com>
Fri, 3 May 2013 08:29:59 +0000 (09:29 +0100)
commitdf4a4eece78b484ea3c29aa1f9e9a03fcbb56c8b
tree11b826a2a9a474249fc13abe351fc05889fb1072
parent81ee6833bc6ccd0c64d2f527775a3ded7aa9bfb4
ASoC: McASP: Fix receive clock polarity in DAIFMT_NB_NF mode.

According documentation bit ACLKRPOL is set to 0 (receiver samples data
on falling edge) and when set to 1 (receiver samples data on rising edge).

I2S data are always sampled on falling edge and valid during rising edge
of bit clock. So in case of capture data transmitter sample data on falling
edge and macsp must read then on rising edge.

Signed-off-by: Marek Belisko <marek.belisko@streamunlimited.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
sound/soc/davinci/davinci-mcasp.c