ARM: 6864/1: hw_breakpoint: clear DBGVCR out of reset
authorWill Deacon <will.deacon@arm.com>
Tue, 5 Apr 2011 12:57:53 +0000 (13:57 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Sun, 10 Apr 2011 20:13:35 +0000 (21:13 +0100)
commite89c0d7090c54d7b11b9b091e495a1ae345dd3ff
tree279617e19acadcafd6c7c22e9e4f5e7395236a9e
parent6a7861825f79f09213ef81b3c468f6f2e86f408e
ARM: 6864/1: hw_breakpoint: clear DBGVCR out of reset

The DBGVCR, used for configuring vector catch debug events, is UNKNOWN
out of reset on ARMv7. When enabling monitor mode, this must be zeroed
to avoid UNPREDICTABLE behaviour.

This patch adds the zeroing code to the debug reset path.

Cc: stable <stable@kernel.org>
Reported-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/kernel/hw_breakpoint.c