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(parent: 27ed2f7) | patch
clk: tegra: dfll: Make code more comprehensible
authorThierry Reding <treding@nvidia.com>
Fri, 8 Apr 2016 13:09:56 +0000 (15:09 +0200)
committerThierry Reding <treding@nvidia.com>
Thu, 28 Apr 2016 10:41:53 +0000 (12:41 +0200)
commite8f6a68c508b5d1cc4612ada028d87c74ab279d5
tree47e8213aaf6ea3bf7286aa0eba891db80952824etree | snapshot
parent27ed2f7e7ca5c38a8ce695e58e6cf270c26f370bcommit | diff
clk: tegra: dfll: Make code more comprehensible

Rename some variables and structure fields to make the code more
comprehensible. Also change the prototype of internal functions to be
more in line with the OPP core functions.

Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/clk/tegra/clk-tegra124-dfll-fcpu.c diff | blob | history
drivers/clk/tegra/cvb.c diff | blob | history
drivers/clk/tegra/cvb.h diff | blob | history
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