MIPS: HTW: Prevent accidental HTW start due to nested htw_{start, stop}
authorMarkos Chandras <markos.chandras@imgtec.com>
Mon, 26 Jan 2015 13:04:33 +0000 (13:04 +0000)
committerRalf Baechle <ralf@linux-mips.org>
Mon, 16 Feb 2015 09:55:26 +0000 (10:55 +0100)
commited4cbc81addbc076b016c5b979fd1a02f0897f0a
treeab240d2c8f5bcd7eacbde7a3f46744ebb99b3995
parentfde3538a8a711aedf1173ecb2d45aed868f51c97
MIPS: HTW: Prevent accidental HTW start due to nested htw_{start, stop}

activate_mm() and switch_mm() call get_new_mmu_context() which in turn
can enable the HTW before the entryhi is changed with the new ASID.
Since the latter will enable the HTW in local_flush_tlb_all(),
then there is a small timing window where the HTW is running with the
new ASID but with an old pgd since the TLBMISS_HANDLER_SETUP_PGD
hasn't assigned a new one yet. In order to prevent that, we introduce a
simple htw counter to avoid starting HTW accidentally due to nested
htw_{start,stop}() sequences. Moreover, since various IPI calls can
enforce TLB flushing operations on a different core, such an operation
may interrupt another htw_{stop,start} in progress leading inconsistent
updates of the htw_seq variable. In order to avoid that, we disable the
interrupts whenever we update that variable.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: <stable@vger.kernel.org> # 3.17+
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9118/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/include/asm/cpu-info.h
arch/mips/include/asm/mmu_context.h
arch/mips/include/asm/pgtable.h
arch/mips/kernel/cpu-probe.c