ARM: dts: sun6i: Set PLL6 as parent to AHB1 clock in AHB1 clock node
authorChen-Yu Tsai <wens@csie.org>
Wed, 25 Mar 2015 21:04:47 +0000 (05:04 +0800)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Mon, 27 Apr 2015 07:04:00 +0000 (09:04 +0200)
commitf22fe1c5ab9f061b7e27e1eb31426d106deb1e22
treee4831044304017ad0513f4915f7af0f4543bf96e
parent2186df37831a8bb259bbf2ae07356747a03d0b8d
ARM: dts: sun6i: Set PLL6 as parent to AHB1 clock in AHB1 clock node

On sun6i we already have PLL6 as AHB1 clock's parent. However this was
previously set in the dma controller node, which takes effect when the
dma controller is probed.

We want this to take effect as soon as possible, so hrtimer rate
calculation is correct, and to be sure the AHB1 clock rate remains as
stable as possible.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
arch/arm/boot/dts/sun6i-a31.dtsi