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18191db)
Missed the last set of changes in prevous delivery.
Changes from waitq to competion.
BUG=chromium-os:25441
TEST=boot the system with bootcache enabled
Change-Id: I452f8315f3e8544df72e7b202c2e365e39834a4b
Signed-off-by: Paul Taysom <taysom@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/32427
Reviewed-by: Mandeep Singh Baines <msb@chromium.org>
struct dm_dev *dev; /* Device for both cache and data */
struct delayed_work work; /* Work that needs a thread */
struct mutex cache_lock; /* Locks everything in cache struct */
struct dm_dev *dev; /* Device for both cache and data */
struct delayed_work work; /* Work that needs a thread */
struct mutex cache_lock; /* Locks everything in cache struct */
- wait_queue_head_t waitq; /* Usering waiting for events */
+ struct completion init_complete; /* Wait for initialization */
struct bootcache_sector_map sectors; /* Table of pages of sectors */
/* Sysfs files for managing the block cache */
struct bin_attribute valid; /* 1 -> valid 0 -> build cache */
struct bootcache_sector_map sectors; /* Table of pages of sectors */
/* Sysfs files for managing the block cache */
struct bin_attribute valid; /* 1 -> valid 0 -> build cache */
state = atomic_read(&cache->state);
switch (state) {
case BC_INIT:
state = atomic_read(&cache->state);
switch (state) {
case BC_INIT:
- wait_event(cache->waitq, atomic_read(&cache->state) != BC_INIT);
+ wait_for_completion(&cache->init_complete);
goto try_again;
case BC_TRACING:
bootcache_record(cache, bio);
goto try_again;
case BC_TRACING:
bootcache_record(cache, bio);
- wake_up_all(&cache->waitq);
+ complete_all(&cache->init_complete);
return;
error:
DMERR("error occured starting bootcache, setting to by pass mode");
return;
error:
DMERR("error occured starting bootcache, setting to by pass mode");
cache = kzalloc(sizeof(*cache), GFP_KERNEL);
if (!cache)
goto bad_cache;
cache = kzalloc(sizeof(*cache), GFP_KERNEL);
if (!cache)
goto bad_cache;
- init_waitqueue_head(&cache->waitq);
+ init_completion(&cache->init_complete);
cache->ti = ti;
cache->args.device = device;
cache->ti = ti;
cache->args.device = device;