Originally we do 50 retries in chipio_send() and dspio_send().
Now it is changed to sleep for 1ms after each try, and timeout after 1 second.
Similar change is applied to wait for DMA done.
BUG=chrome-os-partner:12327
TEST=play youtube, suspend/resume 10 times.
Signed-off-by: Chih-Chung Chang <chihchung@chromium.org>
Change-Id: I59e9350a48721a8e426bfba1da2f2aad7ee907a0
Reviewed-on: https://gerrit.chromium.org/gerrit/32128
u32 data)
{
unsigned int res;
u32 data)
{
unsigned int res;
+ unsigned long timeout = jiffies + msecs_to_jiffies(1000);
/* send bits of data specified by reg */
do {
/* send bits of data specified by reg */
do {
reg, data);
if (res == VENDOR_STATUS_CHIPIO_OK)
return 0;
reg, data);
if (res == VENDOR_STATUS_CHIPIO_OK)
return 0;
+ msleep(1);
+ } while (time_before(jiffies, timeout));
unsigned int data)
{
unsigned int res;
unsigned int data)
{
unsigned int res;
+ unsigned long timeout = jiffies + msecs_to_jiffies(1000);
/* send bits of data specified by reg to dsp */
do {
res = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, reg, data);
if ((res >= 0) && (res != VENDOR_STATUS_DSPIO_BUSY))
return res;
/* send bits of data specified by reg to dsp */
do {
res = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, reg, data);
if ((res >= 0) && (res != VENDOR_STATUS_DSPIO_BUSY))
return res;
+ msleep(1);
+ } while (time_before(jiffies, timeout));
u32 chip_addx_remainder;
unsigned int run_size_words;
const struct dsp_image_seg *hci_write = NULL;
u32 chip_addx_remainder;
unsigned int run_size_words;
const struct dsp_image_seg *hci_write = NULL;
+ unsigned long timeout;
+ bool dma_active;
CTASSERT(fls != NULL);
if (fls == NULL)
CTASSERT(fls != NULL);
if (fls == NULL)
status = dspxfr_hci_write(codec, hci_write);
hci_write = NULL;
}
status = dspxfr_hci_write(codec, hci_write);
hci_write = NULL;
}
- retry = 5000;
- while (dsp_is_dma_active(codec, dma_chan)) {
- if (--retry <= 0)
+
+ timeout = jiffies + msecs_to_jiffies(2000);
+ do {
+ dma_active = dsp_is_dma_active(codec, dma_chan);
+ if (!dma_active)
+ msleep(1);
+ } while (time_before(jiffies, timeout));
+ if (dma_active)
+ break;
CA0132_DSP_LOG("+++++ DMA complete");
dma_set_state(dma_engine, DMA_STATE_STOP);
status = dma_reset(dma_engine);
CA0132_DSP_LOG("+++++ DMA complete");
dma_set_state(dma_engine, DMA_STATE_STOP);
status = dma_reset(dma_engine);