BACKPORT: drm/i915: Implement w/a for sporadic read failures on waking from rc6

As a w/a to prevent reads sporadically returning 0, we need to wait for
the GT thread to return to TC0 before proceeding to read the registers.

Change-Id: I0a501fc164d2e47e774eea0f88bdfbd0e6d37caa
References: https://bugs.freedesktop.org/show_bug.cgi?id=50243
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
TEST=compiles and runs
BUG=none

Change-Id: I8d79cc14a9059f46ddb8ca77bf9c98e60d8e8c96
Reviewed-on: https://gerrit.chromium.org/gerrit/25258
Tested-by: Stéphane Marchesin <marcheu@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Ready: Stéphane Marchesin <marcheu@chromium.org>

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 0270a2f..fce0426 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -342,6 +342,19 @@ void intel_detect_pch(struct drm_device *dev)
        }
 }
 
+static void __gen6_gt_wait_for_thread_c0(struct drm_i915_private *dev_priv)
+{
+       unsigned long timeout;
+
+       /* w/a for a sporadic read returning 0 by waiting for the GT
+        * thread to wake up.
+        */
+       timeout = jiffies + msecs_to_jiffies(1);
+       while (I915_READ_NOTRACE(GEN6_GT_THREAD_STATUS_REG) & GEN6_GT_THREAD_STATUS_CORE_MASK &&
+              time_before(jiffies, timeout))
+               ;
+}
+
 void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
 {
        int count;
@@ -356,6 +369,8 @@ void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
        count = 0;
        while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1) == 0)
                udelay(10);
+
+       __gen6_gt_wait_for_thread_c0(dev_priv);
 }
 
 void __gen6_gt_force_wake_mt_get(struct drm_i915_private *dev_priv)
@@ -372,6 +387,8 @@ void __gen6_gt_force_wake_mt_get(struct drm_i915_private *dev_priv)
        count = 0;
        while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_MT_ACK) & 1) == 0)
                udelay(10);
+
+       __gen6_gt_wait_for_thread_c0(dev_priv);
 }
 
 /*

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 552264c..8bdf2cb 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1351,6 +1351,9 @@
 #define DDRMPLL1               0X12c20
 #define PEG_BAND_GAP_DATA      0x14d68
 
+#define GEN6_GT_THREAD_STATUS_REG 0x13805c
+#define GEN6_GT_THREAD_STATUS_CORE_MASK 0x7
+
 #define GEN6_GT_PERF_STATUS    0x145948
 #define GEN6_RP_STATE_LIMITS   0x145994
 #define GEN6_RP_STATE_CAP      0x145998