ARM: dts: berlin: add the SDHCI nodes for the BG2Q

Add the SDHCI nodes for the Marvell Berlin BG2Q, using the mrvl,pxav3-mmc
driver.

Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index 81712f5..635a16a 100644 (file)
--- a/arch/arm/boot/dts/berlin2q.dtsi
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -62,6 +62,30 @@
                ranges = <0 0xf7000000 0x1000000>;
                interrupt-parent = <&gic>;
 
+               sdhci0: sdhci@ab0000 {
+                       compatible = "mrvl,pxav3-mmc";
+                       reg = <0xab0000 0x200>;
+                       clocks = <&chip CLKID_SDIO1XIN>;
+                       interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+                       status = "disabled";
+               };
+
+               sdhci1: sdhci@ab0800 {
+                       compatible = "mrvl,pxav3-mmc";
+                       reg = <0xab0800 0x200>;
+                       clocks = <&chip CLKID_SDIO1XIN>;
+                       interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+                       status = "disabled";
+               };
+
+               sdhci2: sdhci@ab1000 {
+                       compatible = "mrvl,pxav3-mmc";
+                       reg = <0xab1000 0x200>;
+                       interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&chip CLKID_SDIO1XIN>;
+                       status = "disabled";
+               };
+
                l2: l2-cache-controller@ac0000 {
                        compatible = "arm,pl310-cache";
                        reg = <0xac0000 0x1000>;