staging: sm750fb: use BIT() macro for single-bit fields definition
authorMike Rapoport <mike.rapoport@gmail.com>
Fri, 19 Feb 2016 15:56:11 +0000 (17:56 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 20 Feb 2016 23:33:00 +0000 (15:33 -0800)
Replace complex definition of single-bit fields with BIT() macro for the
registers that are not currently referenced by the driver.

Signed-off-by: Mike Rapoport <mike.rapoport@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/sm750fb/ddk750_reg.h
drivers/staging/sm750fb/sm750_accel.h

index 95c5cac..d96ea9e 100644 (file)
 #define GPIO_MUX_0                                    BIT(0)
 
 #define LOCALMEM_ARBITRATION                          0x00000C
-#define LOCALMEM_ARBITRATION_ROTATE                   28:28
-#define LOCALMEM_ARBITRATION_ROTATE_OFF               0
-#define LOCALMEM_ARBITRATION_ROTATE_ON                1
+#define LOCALMEM_ARBITRATION_ROTATE                   BIT(28)
 #define LOCALMEM_ARBITRATION_VGA                      26:24
 #define LOCALMEM_ARBITRATION_VGA_OFF                  0
 #define LOCALMEM_ARBITRATION_VGA_PRIORITY_1           1
 #define LOCALMEM_ARBITRATION_CRT_PRIORITY_7           7
 
 #define PCIMEM_ARBITRATION                            0x000010
-#define PCIMEM_ARBITRATION_ROTATE                     28:28
-#define PCIMEM_ARBITRATION_ROTATE_OFF                 0
-#define PCIMEM_ARBITRATION_ROTATE_ON                  1
+#define PCIMEM_ARBITRATION_ROTATE                     BIT(28)
 #define PCIMEM_ARBITRATION_VGA                        26:24
 #define PCIMEM_ARBITRATION_VGA_OFF                    0
 #define PCIMEM_ARBITRATION_VGA_PRIORITY_1             1
 #define PCIMEM_ARBITRATION_CRT_PRIORITY_7             7
 
 #define RAW_INT                                       0x000020
-#define RAW_INT_ZVPORT1_VSYNC                         4:4
-#define RAW_INT_ZVPORT1_VSYNC_INACTIVE                0
-#define RAW_INT_ZVPORT1_VSYNC_ACTIVE                  1
-#define RAW_INT_ZVPORT1_VSYNC_CLEAR                   1
-#define RAW_INT_ZVPORT0_VSYNC                         3:3
-#define RAW_INT_ZVPORT0_VSYNC_INACTIVE                0
-#define RAW_INT_ZVPORT0_VSYNC_ACTIVE                  1
-#define RAW_INT_ZVPORT0_VSYNC_CLEAR                   1
-#define RAW_INT_CRT_VSYNC                             2:2
-#define RAW_INT_CRT_VSYNC_INACTIVE                    0
-#define RAW_INT_CRT_VSYNC_ACTIVE                      1
-#define RAW_INT_CRT_VSYNC_CLEAR                       1
-#define RAW_INT_PANEL_VSYNC                           1:1
-#define RAW_INT_PANEL_VSYNC_INACTIVE                  0
-#define RAW_INT_PANEL_VSYNC_ACTIVE                    1
-#define RAW_INT_PANEL_VSYNC_CLEAR                     1
-#define RAW_INT_VGA_VSYNC                             0:0
-#define RAW_INT_VGA_VSYNC_INACTIVE                    0
-#define RAW_INT_VGA_VSYNC_ACTIVE                      1
-#define RAW_INT_VGA_VSYNC_CLEAR                       1
+#define RAW_INT_ZVPORT1_VSYNC                         BIT(4)
+#define RAW_INT_ZVPORT0_VSYNC                         BIT(3)
+#define RAW_INT_CRT_VSYNC                             BIT(2)
+#define RAW_INT_PANEL_VSYNC                           BIT(1)
+#define RAW_INT_VGA_VSYNC                             BIT(0)
 
 #define INT_STATUS                                    0x000024
-#define INT_STATUS_GPIO31                             31:31
-#define INT_STATUS_GPIO31_INACTIVE                    0
-#define INT_STATUS_GPIO31_ACTIVE                      1
-#define INT_STATUS_GPIO30                             30:30
-#define INT_STATUS_GPIO30_INACTIVE                    0
-#define INT_STATUS_GPIO30_ACTIVE                      1
-#define INT_STATUS_GPIO29                             29:29
-#define INT_STATUS_GPIO29_INACTIVE                    0
-#define INT_STATUS_GPIO29_ACTIVE                      1
-#define INT_STATUS_GPIO28                             28:28
-#define INT_STATUS_GPIO28_INACTIVE                    0
-#define INT_STATUS_GPIO28_ACTIVE                      1
-#define INT_STATUS_GPIO27                             27:27
-#define INT_STATUS_GPIO27_INACTIVE                    0
-#define INT_STATUS_GPIO27_ACTIVE                      1
-#define INT_STATUS_GPIO26                             26:26
-#define INT_STATUS_GPIO26_INACTIVE                    0
-#define INT_STATUS_GPIO26_ACTIVE                      1
-#define INT_STATUS_GPIO25                             25:25
-#define INT_STATUS_GPIO25_INACTIVE                    0
-#define INT_STATUS_GPIO25_ACTIVE                      1
-#define INT_STATUS_I2C                                12:12
-#define INT_STATUS_I2C_INACTIVE                       0
-#define INT_STATUS_I2C_ACTIVE                         1
-#define INT_STATUS_PWM                                11:11
-#define INT_STATUS_PWM_INACTIVE                       0
-#define INT_STATUS_PWM_ACTIVE                         1
-#define INT_STATUS_DMA1                               10:10
-#define INT_STATUS_DMA1_INACTIVE                      0
-#define INT_STATUS_DMA1_ACTIVE                        1
-#define INT_STATUS_DMA0                               9:9
-#define INT_STATUS_DMA0_INACTIVE                      0
-#define INT_STATUS_DMA0_ACTIVE                        1
-#define INT_STATUS_PCI                                8:8
-#define INT_STATUS_PCI_INACTIVE                       0
-#define INT_STATUS_PCI_ACTIVE                         1
-#define INT_STATUS_SSP1                               7:7
-#define INT_STATUS_SSP1_INACTIVE                      0
-#define INT_STATUS_SSP1_ACTIVE                        1
-#define INT_STATUS_SSP0                               6:6
-#define INT_STATUS_SSP0_INACTIVE                      0
-#define INT_STATUS_SSP0_ACTIVE                        1
-#define INT_STATUS_DE                                 5:5
-#define INT_STATUS_DE_INACTIVE                        0
-#define INT_STATUS_DE_ACTIVE                          1
-#define INT_STATUS_ZVPORT1_VSYNC                      4:4
-#define INT_STATUS_ZVPORT1_VSYNC_INACTIVE             0
-#define INT_STATUS_ZVPORT1_VSYNC_ACTIVE               1
-#define INT_STATUS_ZVPORT0_VSYNC                      3:3
-#define INT_STATUS_ZVPORT0_VSYNC_INACTIVE             0
-#define INT_STATUS_ZVPORT0_VSYNC_ACTIVE               1
-#define INT_STATUS_CRT_VSYNC                          2:2
-#define INT_STATUS_CRT_VSYNC_INACTIVE                 0
-#define INT_STATUS_CRT_VSYNC_ACTIVE                   1
-#define INT_STATUS_PANEL_VSYNC                        1:1
-#define INT_STATUS_PANEL_VSYNC_INACTIVE               0
-#define INT_STATUS_PANEL_VSYNC_ACTIVE                 1
-#define INT_STATUS_VGA_VSYNC                          0:0
-#define INT_STATUS_VGA_VSYNC_INACTIVE                 0
-#define INT_STATUS_VGA_VSYNC_ACTIVE                   1
+#define INT_STATUS_GPIO31                             BIT(31)
+#define INT_STATUS_GPIO30                             BIT(30)
+#define INT_STATUS_GPIO29                             BIT(29)
+#define INT_STATUS_GPIO28                             BIT(28)
+#define INT_STATUS_GPIO27                             BIT(27)
+#define INT_STATUS_GPIO26                             BIT(26)
+#define INT_STATUS_GPIO25                             BIT(25)
+#define INT_STATUS_I2C                                BIT(12)
+#define INT_STATUS_PWM                                BIT(11)
+#define INT_STATUS_DMA1                               BIT(10)
+#define INT_STATUS_DMA0                               BIT(9)
+#define INT_STATUS_PCI                                BIT(8)
+#define INT_STATUS_SSP1                               BIT(7)
+#define INT_STATUS_SSP0                               BIT(6)
+#define INT_STATUS_DE                                 BIT(5)
+#define INT_STATUS_ZVPORT1_VSYNC                      BIT(4)
+#define INT_STATUS_ZVPORT0_VSYNC                      BIT(3)
+#define INT_STATUS_CRT_VSYNC                          BIT(2)
+#define INT_STATUS_PANEL_VSYNC                        BIT(1)
+#define INT_STATUS_VGA_VSYNC                          BIT(0)
 
 #define INT_MASK                                      0x000028
-#define INT_MASK_GPIO31                               31:31
-#define INT_MASK_GPIO31_DISABLE                       0
-#define INT_MASK_GPIO31_ENABLE                        1
-#define INT_MASK_GPIO30                               30:30
-#define INT_MASK_GPIO30_DISABLE                       0
-#define INT_MASK_GPIO30_ENABLE                        1
-#define INT_MASK_GPIO29                               29:29
-#define INT_MASK_GPIO29_DISABLE                       0
-#define INT_MASK_GPIO29_ENABLE                        1
-#define INT_MASK_GPIO28                               28:28
-#define INT_MASK_GPIO28_DISABLE                       0
-#define INT_MASK_GPIO28_ENABLE                        1
-#define INT_MASK_GPIO27                               27:27
-#define INT_MASK_GPIO27_DISABLE                       0
-#define INT_MASK_GPIO27_ENABLE                        1
-#define INT_MASK_GPIO26                               26:26
-#define INT_MASK_GPIO26_DISABLE                       0
-#define INT_MASK_GPIO26_ENABLE                        1
-#define INT_MASK_GPIO25                               25:25
-#define INT_MASK_GPIO25_DISABLE                       0
-#define INT_MASK_GPIO25_ENABLE                        1
-#define INT_MASK_I2C                                  12:12
-#define INT_MASK_I2C_DISABLE                          0
-#define INT_MASK_I2C_ENABLE                           1
-#define INT_MASK_PWM                                  11:11
-#define INT_MASK_PWM_DISABLE                          0
-#define INT_MASK_PWM_ENABLE                           1
-#define INT_MASK_DMA1                                 10:10
-#define INT_MASK_DMA1_DISABLE                         0
-#define INT_MASK_DMA1_ENABLE                          1
-#define INT_MASK_DMA                                  9:9
-#define INT_MASK_DMA_DISABLE                          0
-#define INT_MASK_DMA_ENABLE                           1
-#define INT_MASK_PCI                                  8:8
-#define INT_MASK_PCI_DISABLE                          0
-#define INT_MASK_PCI_ENABLE                           1
-#define INT_MASK_SSP1                                 7:7
-#define INT_MASK_SSP1_DISABLE                         0
-#define INT_MASK_SSP1_ENABLE                          1
-#define INT_MASK_SSP0                                 6:6
-#define INT_MASK_SSP0_DISABLE                         0
-#define INT_MASK_SSP0_ENABLE                          1
-#define INT_MASK_DE                                   5:5
-#define INT_MASK_DE_DISABLE                           0
-#define INT_MASK_DE_ENABLE                            1
-#define INT_MASK_ZVPORT1_VSYNC                        4:4
-#define INT_MASK_ZVPORT1_VSYNC_DISABLE                0
-#define INT_MASK_ZVPORT1_VSYNC_ENABLE                 1
-#define INT_MASK_ZVPORT0_VSYNC                        3:3
-#define INT_MASK_ZVPORT0_VSYNC_DISABLE                0
-#define INT_MASK_ZVPORT0_VSYNC_ENABLE                 1
-#define INT_MASK_CRT_VSYNC                            2:2
-#define INT_MASK_CRT_VSYNC_DISABLE                    0
-#define INT_MASK_CRT_VSYNC_ENABLE                     1
-#define INT_MASK_PANEL_VSYNC                          1:1
-#define INT_MASK_PANEL_VSYNC_DISABLE                  0
-#define INT_MASK_PANEL_VSYNC_ENABLE                   1
-#define INT_MASK_VGA_VSYNC                            0:0
-#define INT_MASK_VGA_VSYNC_DISABLE                    0
-#define INT_MASK_VGA_VSYNC_ENABLE                     1
+#define INT_MASK_GPIO31                               BIT(31)
+#define INT_MASK_GPIO30                               BIT(30)
+#define INT_MASK_GPIO29                               BIT(29)
+#define INT_MASK_GPIO28                               BIT(28)
+#define INT_MASK_GPIO27                               BIT(27)
+#define INT_MASK_GPIO26                               BIT(26)
+#define INT_MASK_GPIO25                               BIT(25)
+#define INT_MASK_I2C                                  BIT(12)
+#define INT_MASK_PWM                                  BIT(11)
+#define INT_MASK_DMA1                                 BIT(10)
+#define INT_MASK_DMA                                  BIT(9)
+#define INT_MASK_PCI                                  BIT(8)
+#define INT_MASK_SSP1                                 BIT(7)
+#define INT_MASK_SSP0                                 BIT(6)
+#define INT_MASK_DE                                   BIT(5)
+#define INT_MASK_ZVPORT1_VSYNC                        BIT(4)
+#define INT_MASK_ZVPORT0_VSYNC                        BIT(3)
+#define INT_MASK_CRT_VSYNC                            BIT(2)
+#define INT_MASK_PANEL_VSYNC                          BIT(1)
+#define INT_MASK_VGA_VSYNC                            BIT(0)
 
 #define CURRENT_GATE                                  0x000040
 #define CURRENT_GATE_MCLK_MASK                        (0x3 << 14)
 #define MODE1_GATE_M2XCLK_168MHZ                      1
 #define MODE1_GATE_M2XCLK_112MHZ                      2
 #define MODE1_GATE_M2XCLK_84MHZ                       3
-#define MODE1_GATE_VGA                                10:10
-#define MODE1_GATE_VGA_OFF                            0
-#define MODE1_GATE_VGA_ON                             1
-#define MODE1_GATE_PWM                                9:9
-#define MODE1_GATE_PWM_OFF                            0
-#define MODE1_GATE_PWM_ON                             1
-#define MODE1_GATE_I2C                                8:8
-#define MODE1_GATE_I2C_OFF                            0
-#define MODE1_GATE_I2C_ON                             1
-#define MODE1_GATE_SSP                                7:7
-#define MODE1_GATE_SSP_OFF                            0
-#define MODE1_GATE_SSP_ON                             1
-#define MODE1_GATE_GPIO                               6:6
-#define MODE1_GATE_GPIO_OFF                           0
-#define MODE1_GATE_GPIO_ON                            1
-#define MODE1_GATE_ZVPORT                             5:5
-#define MODE1_GATE_ZVPORT_OFF                         0
-#define MODE1_GATE_ZVPORT_ON                          1
-#define MODE1_GATE_CSC                                4:4
-#define MODE1_GATE_CSC_OFF                            0
-#define MODE1_GATE_CSC_ON                             1
-#define MODE1_GATE_DE                                 3:3
-#define MODE1_GATE_DE_OFF                             0
-#define MODE1_GATE_DE_ON                              1
-#define MODE1_GATE_DISPLAY                            2:2
-#define MODE1_GATE_DISPLAY_OFF                        0
-#define MODE1_GATE_DISPLAY_ON                         1
-#define MODE1_GATE_LOCALMEM                           1:1
-#define MODE1_GATE_LOCALMEM_OFF                       0
-#define MODE1_GATE_LOCALMEM_ON                        1
-#define MODE1_GATE_DMA                                0:0
-#define MODE1_GATE_DMA_OFF                            0
-#define MODE1_GATE_DMA_ON                             1
+#define MODE1_GATE_VGA                                BIT(10)
+#define MODE1_GATE_PWM                                BIT(9)
+#define MODE1_GATE_I2C                                BIT(8)
+#define MODE1_GATE_SSP                                BIT(7)
+#define MODE1_GATE_GPIO                               BIT(6)
+#define MODE1_GATE_ZVPORT                             BIT(5)
+#define MODE1_GATE_CSC                                BIT(4)
+#define MODE1_GATE_DE                                 BIT(3)
+#define MODE1_GATE_DISPLAY                            BIT(2)
+#define MODE1_GATE_LOCALMEM                           BIT(1)
+#define MODE1_GATE_DMA                                BIT(0)
 
 #define POWER_MODE_CTRL                               0x00004C
 #ifdef VALIDATION_CHIP
 #endif
 
 #define GPIO_DATA                                       0x010000
-#define GPIO_DATA_31                                    31:31
-#define GPIO_DATA_30                                    30:30
-#define GPIO_DATA_29                                    29:29
-#define GPIO_DATA_28                                    28:28
-#define GPIO_DATA_27                                    27:27
-#define GPIO_DATA_26                                    26:26
-#define GPIO_DATA_25                                    25:25
-#define GPIO_DATA_24                                    24:24
-#define GPIO_DATA_23                                    23:23
-#define GPIO_DATA_22                                    22:22
-#define GPIO_DATA_21                                    21:21
-#define GPIO_DATA_20                                    20:20
-#define GPIO_DATA_19                                    19:19
-#define GPIO_DATA_18                                    18:18
-#define GPIO_DATA_17                                    17:17
-#define GPIO_DATA_16                                    16:16
-#define GPIO_DATA_15                                    15:15
-#define GPIO_DATA_14                                    14:14
-#define GPIO_DATA_13                                    13:13
-#define GPIO_DATA_12                                    12:12
-#define GPIO_DATA_11                                    11:11
-#define GPIO_DATA_10                                    10:10
-#define GPIO_DATA_9                                     9:9
-#define GPIO_DATA_8                                     8:8
-#define GPIO_DATA_7                                     7:7
-#define GPIO_DATA_6                                     6:6
-#define GPIO_DATA_5                                     5:5
-#define GPIO_DATA_4                                     4:4
-#define GPIO_DATA_3                                     3:3
-#define GPIO_DATA_2                                     2:2
-#define GPIO_DATA_1                                     1:1
-#define GPIO_DATA_0                                     0:0
+#define GPIO_DATA_31                                    BIT(31)
+#define GPIO_DATA_30                                    BIT(30)
+#define GPIO_DATA_29                                    BIT(29)
+#define GPIO_DATA_28                                    BIT(28)
+#define GPIO_DATA_27                                    BIT(27)
+#define GPIO_DATA_26                                    BIT(26)
+#define GPIO_DATA_25                                    BIT(25)
+#define GPIO_DATA_24                                    BIT(24)
+#define GPIO_DATA_23                                    BIT(23)
+#define GPIO_DATA_22                                    BIT(22)
+#define GPIO_DATA_21                                    BIT(21)
+#define GPIO_DATA_20                                    BIT(20)
+#define GPIO_DATA_19                                    BIT(19)
+#define GPIO_DATA_18                                    BIT(18)
+#define GPIO_DATA_17                                    BIT(17)
+#define GPIO_DATA_16                                    BIT(16)
+#define GPIO_DATA_15                                    BIT(15)
+#define GPIO_DATA_14                                    BIT(14)
+#define GPIO_DATA_13                                    BIT(13)
+#define GPIO_DATA_12                                    BIT(12)
+#define GPIO_DATA_11                                    BIT(11)
+#define GPIO_DATA_10                                    BIT(10)
+#define GPIO_DATA_9                                     BIT(9)
+#define GPIO_DATA_8                                     BIT(8)
+#define GPIO_DATA_7                                     BIT(7)
+#define GPIO_DATA_6                                     BIT(6)
+#define GPIO_DATA_5                                     BIT(5)
+#define GPIO_DATA_4                                     BIT(4)
+#define GPIO_DATA_3                                     BIT(3)
+#define GPIO_DATA_2                                     BIT(2)
+#define GPIO_DATA_1                                     BIT(1)
+#define GPIO_DATA_0                                     BIT(0)
 
 #define GPIO_DATA_DIRECTION                             0x010004
-#define GPIO_DATA_DIRECTION_31                          31:31
-#define GPIO_DATA_DIRECTION_31_INPUT                    0
-#define GPIO_DATA_DIRECTION_31_OUTPUT                   1
-#define GPIO_DATA_DIRECTION_30                          30:30
-#define GPIO_DATA_DIRECTION_30_INPUT                    0
-#define GPIO_DATA_DIRECTION_30_OUTPUT                   1
-#define GPIO_DATA_DIRECTION_29                          29:29
-#define GPIO_DATA_DIRECTION_29_INPUT                    0
-#define GPIO_DATA_DIRECTION_29_OUTPUT                   1
-#define GPIO_DATA_DIRECTION_28                          28:28
-#define GPIO_DATA_DIRECTION_28_INPUT                    0
-#define GPIO_DATA_DIRECTION_28_OUTPUT                   1
-#define GPIO_DATA_DIRECTION_27                          27:27
-#define GPIO_DATA_DIRECTION_27_INPUT                    0
-#define GPIO_DATA_DIRECTION_27_OUTPUT                   1
-#define GPIO_DATA_DIRECTION_26                          26:26
-#define GPIO_DATA_DIRECTION_26_INPUT                    0
-#define GPIO_DATA_DIRECTION_26_OUTPUT                   1
-#define GPIO_DATA_DIRECTION_25                          25:25
-#define GPIO_DATA_DIRECTION_25_INPUT                    0
-#define GPIO_DATA_DIRECTION_25_OUTPUT                   1
-#define GPIO_DATA_DIRECTION_24                          24:24
-#define GPIO_DATA_DIRECTION_24_INPUT                    0
-#define GPIO_DATA_DIRECTION_24_OUTPUT                   1
-#define GPIO_DATA_DIRECTION_23                          23:23
-#define GPIO_DATA_DIRECTION_23_INPUT                    0
-#define GPIO_DATA_DIRECTION_23_OUTPUT                   1
-#define GPIO_DATA_DIRECTION_22                          22:22
-#define GPIO_DATA_DIRECTION_22_INPUT                    0
-#define GPIO_DATA_DIRECTION_22_OUTPUT                   1
-#define GPIO_DATA_DIRECTION_21                          21:21
-#define GPIO_DATA_DIRECTION_21_INPUT                    0
-#define GPIO_DATA_DIRECTION_21_OUTPUT                   1
-#define GPIO_DATA_DIRECTION_20                          20:20
-#define GPIO_DATA_DIRECTION_20_INPUT                    0
-#define GPIO_DATA_DIRECTION_20_OUTPUT                   1
-#define GPIO_DATA_DIRECTION_19                          19:19
-#define GPIO_DATA_DIRECTION_19_INPUT                    0
-#define GPIO_DATA_DIRECTION_19_OUTPUT                   1
-#define GPIO_DATA_DIRECTION_18                          18:18
-#define GPIO_DATA_DIRECTION_18_INPUT                    0
-#define GPIO_DATA_DIRECTION_18_OUTPUT                   1
-#define GPIO_DATA_DIRECTION_17                          17:17
-#define GPIO_DATA_DIRECTION_17_INPUT                    0
-#define GPIO_DATA_DIRECTION_17_OUTPUT                   1
-#define GPIO_DATA_DIRECTION_16                          16:16
-#define GPIO_DATA_DIRECTION_16_INPUT                    0
-#define GPIO_DATA_DIRECTION_16_OUTPUT                   1
-#define GPIO_DATA_DIRECTION_15                          15:15
-#define GPIO_DATA_DIRECTION_15_INPUT                    0
-#define GPIO_DATA_DIRECTION_15_OUTPUT                   1
-#define GPIO_DATA_DIRECTION_14                          14:14
-#define GPIO_DATA_DIRECTION_14_INPUT                    0
-#define GPIO_DATA_DIRECTION_14_OUTPUT                   1
-#define GPIO_DATA_DIRECTION_13                          13:13
-#define GPIO_DATA_DIRECTION_13_INPUT                    0
-#define GPIO_DATA_DIRECTION_13_OUTPUT                   1
-#define GPIO_DATA_DIRECTION_12                          12:12
-#define GPIO_DATA_DIRECTION_12_INPUT                    0
-#define GPIO_DATA_DIRECTION_12_OUTPUT                   1
-#define GPIO_DATA_DIRECTION_11                          11:11
-#define GPIO_DATA_DIRECTION_11_INPUT                    0
-#define GPIO_DATA_DIRECTION_11_OUTPUT                   1
-#define GPIO_DATA_DIRECTION_10                          10:10
-#define GPIO_DATA_DIRECTION_10_INPUT                    0
-#define GPIO_DATA_DIRECTION_10_OUTPUT                   1
-#define GPIO_DATA_DIRECTION_9                           9:9
-#define GPIO_DATA_DIRECTION_9_INPUT                     0
-#define GPIO_DATA_DIRECTION_9_OUTPUT                    1
-#define GPIO_DATA_DIRECTION_8                           8:8
-#define GPIO_DATA_DIRECTION_8_INPUT                     0
-#define GPIO_DATA_DIRECTION_8_OUTPUT                    1
-#define GPIO_DATA_DIRECTION_7                           7:7
-#define GPIO_DATA_DIRECTION_7_INPUT                     0
-#define GPIO_DATA_DIRECTION_7_OUTPUT                    1
-#define GPIO_DATA_DIRECTION_6                           6:6
-#define GPIO_DATA_DIRECTION_6_INPUT                     0
-#define GPIO_DATA_DIRECTION_6_OUTPUT                    1
-#define GPIO_DATA_DIRECTION_5                           5:5
-#define GPIO_DATA_DIRECTION_5_INPUT                     0
-#define GPIO_DATA_DIRECTION_5_OUTPUT                    1
-#define GPIO_DATA_DIRECTION_4                           4:4
-#define GPIO_DATA_DIRECTION_4_INPUT                     0
-#define GPIO_DATA_DIRECTION_4_OUTPUT                    1
-#define GPIO_DATA_DIRECTION_3                           3:3
-#define GPIO_DATA_DIRECTION_3_INPUT                     0
-#define GPIO_DATA_DIRECTION_3_OUTPUT                    1
-#define GPIO_DATA_DIRECTION_2                           2:2
-#define GPIO_DATA_DIRECTION_2_INPUT                     0
-#define GPIO_DATA_DIRECTION_2_OUTPUT                    1
-#define GPIO_DATA_DIRECTION_1                           131
-#define GPIO_DATA_DIRECTION_1_INPUT                     0
-#define GPIO_DATA_DIRECTION_1_OUTPUT                    1
-#define GPIO_DATA_DIRECTION_0                           0:0
-#define GPIO_DATA_DIRECTION_0_INPUT                     0
-#define GPIO_DATA_DIRECTION_0_OUTPUT                    1
+#define GPIO_DATA_DIRECTION_31                          BIT(31)
+#define GPIO_DATA_DIRECTION_30                          BIT(30)
+#define GPIO_DATA_DIRECTION_29                          BIT(29)
+#define GPIO_DATA_DIRECTION_28                          BIT(28)
+#define GPIO_DATA_DIRECTION_27                          BIT(27)
+#define GPIO_DATA_DIRECTION_26                          BIT(26)
+#define GPIO_DATA_DIRECTION_25                          BIT(25)
+#define GPIO_DATA_DIRECTION_24                          BIT(24)
+#define GPIO_DATA_DIRECTION_23                          BIT(23)
+#define GPIO_DATA_DIRECTION_22                          BIT(22)
+#define GPIO_DATA_DIRECTION_21                          BIT(21)
+#define GPIO_DATA_DIRECTION_20                          BIT(20)
+#define GPIO_DATA_DIRECTION_19                          BIT(19)
+#define GPIO_DATA_DIRECTION_18                          BIT(18)
+#define GPIO_DATA_DIRECTION_17                          BIT(17)
+#define GPIO_DATA_DIRECTION_16                          BIT(16)
+#define GPIO_DATA_DIRECTION_15                          BIT(15)
+#define GPIO_DATA_DIRECTION_14                          BIT(14)
+#define GPIO_DATA_DIRECTION_13                          BIT(13)
+#define GPIO_DATA_DIRECTION_12                          BIT(12)
+#define GPIO_DATA_DIRECTION_11                          BIT(11)
+#define GPIO_DATA_DIRECTION_10                          BIT(10)
+#define GPIO_DATA_DIRECTION_9                           BIT(9)
+#define GPIO_DATA_DIRECTION_8                           BIT(8)
+#define GPIO_DATA_DIRECTION_7                           BIT(7)
+#define GPIO_DATA_DIRECTION_6                           BIT(6)
+#define GPIO_DATA_DIRECTION_5                           BIT(5)
+#define GPIO_DATA_DIRECTION_4                           BIT(4)
+#define GPIO_DATA_DIRECTION_3                           BIT(3)
+#define GPIO_DATA_DIRECTION_2                           BIT(2)
+#define GPIO_DATA_DIRECTION_1                           BIT(1)
+#define GPIO_DATA_DIRECTION_0                           BIT(0)
 
 #define GPIO_INTERRUPT_SETUP                            0x010008
-#define GPIO_INTERRUPT_SETUP_TRIGGER_31                 22:22
-#define GPIO_INTERRUPT_SETUP_TRIGGER_31_EDGE            0
-#define GPIO_INTERRUPT_SETUP_TRIGGER_31_LEVEL           1
-#define GPIO_INTERRUPT_SETUP_TRIGGER_30                 21:21
-#define GPIO_INTERRUPT_SETUP_TRIGGER_30_EDGE            0
-#define GPIO_INTERRUPT_SETUP_TRIGGER_30_LEVEL           1
-#define GPIO_INTERRUPT_SETUP_TRIGGER_29                 20:20
-#define GPIO_INTERRUPT_SETUP_TRIGGER_29_EDGE            0
-#define GPIO_INTERRUPT_SETUP_TRIGGER_29_LEVEL           1
-#define GPIO_INTERRUPT_SETUP_TRIGGER_28                 19:19
-#define GPIO_INTERRUPT_SETUP_TRIGGER_28_EDGE            0
-#define GPIO_INTERRUPT_SETUP_TRIGGER_28_LEVEL           1
-#define GPIO_INTERRUPT_SETUP_TRIGGER_27                 18:18
-#define GPIO_INTERRUPT_SETUP_TRIGGER_27_EDGE            0
-#define GPIO_INTERRUPT_SETUP_TRIGGER_27_LEVEL           1
-#define GPIO_INTERRUPT_SETUP_TRIGGER_26                 17:17
-#define GPIO_INTERRUPT_SETUP_TRIGGER_26_EDGE            0
-#define GPIO_INTERRUPT_SETUP_TRIGGER_26_LEVEL           1
-#define GPIO_INTERRUPT_SETUP_TRIGGER_25                 16:16
-#define GPIO_INTERRUPT_SETUP_TRIGGER_25_EDGE            0
-#define GPIO_INTERRUPT_SETUP_TRIGGER_25_LEVEL           1
-#define GPIO_INTERRUPT_SETUP_ACTIVE_31                  14:14
-#define GPIO_INTERRUPT_SETUP_ACTIVE_31_LOW              0
-#define GPIO_INTERRUPT_SETUP_ACTIVE_31_HIGH             1
-#define GPIO_INTERRUPT_SETUP_ACTIVE_30                  13:13
-#define GPIO_INTERRUPT_SETUP_ACTIVE_30_LOW              0
-#define GPIO_INTERRUPT_SETUP_ACTIVE_30_HIGH             1
-#define GPIO_INTERRUPT_SETUP_ACTIVE_29                  12:12
-#define GPIO_INTERRUPT_SETUP_ACTIVE_29_LOW              0
-#define GPIO_INTERRUPT_SETUP_ACTIVE_29_HIGH             1
-#define GPIO_INTERRUPT_SETUP_ACTIVE_28                  11:11
-#define GPIO_INTERRUPT_SETUP_ACTIVE_28_LOW              0
-#define GPIO_INTERRUPT_SETUP_ACTIVE_28_HIGH             1
-#define GPIO_INTERRUPT_SETUP_ACTIVE_27                  10:10
-#define GPIO_INTERRUPT_SETUP_ACTIVE_27_LOW              0
-#define GPIO_INTERRUPT_SETUP_ACTIVE_27_HIGH             1
-#define GPIO_INTERRUPT_SETUP_ACTIVE_26                  9:9
-#define GPIO_INTERRUPT_SETUP_ACTIVE_26_LOW              0
-#define GPIO_INTERRUPT_SETUP_ACTIVE_26_HIGH             1
-#define GPIO_INTERRUPT_SETUP_ACTIVE_25                  8:8
-#define GPIO_INTERRUPT_SETUP_ACTIVE_25_LOW              0
-#define GPIO_INTERRUPT_SETUP_ACTIVE_25_HIGH             1
-#define GPIO_INTERRUPT_SETUP_ENABLE_31                  6:6
-#define GPIO_INTERRUPT_SETUP_ENABLE_31_GPIO             0
-#define GPIO_INTERRUPT_SETUP_ENABLE_31_INTERRUPT        1
-#define GPIO_INTERRUPT_SETUP_ENABLE_30                  5:5
-#define GPIO_INTERRUPT_SETUP_ENABLE_30_GPIO             0
-#define GPIO_INTERRUPT_SETUP_ENABLE_30_INTERRUPT        1
-#define GPIO_INTERRUPT_SETUP_ENABLE_29                  4:4
-#define GPIO_INTERRUPT_SETUP_ENABLE_29_GPIO             0
-#define GPIO_INTERRUPT_SETUP_ENABLE_29_INTERRUPT        1
-#define GPIO_INTERRUPT_SETUP_ENABLE_28                  3:3
-#define GPIO_INTERRUPT_SETUP_ENABLE_28_GPIO             0
-#define GPIO_INTERRUPT_SETUP_ENABLE_28_INTERRUPT        1
-#define GPIO_INTERRUPT_SETUP_ENABLE_27                  2:2
-#define GPIO_INTERRUPT_SETUP_ENABLE_27_GPIO             0
-#define GPIO_INTERRUPT_SETUP_ENABLE_27_INTERRUPT        1
-#define GPIO_INTERRUPT_SETUP_ENABLE_26                  1:1
-#define GPIO_INTERRUPT_SETUP_ENABLE_26_GPIO             0
-#define GPIO_INTERRUPT_SETUP_ENABLE_26_INTERRUPT        1
-#define GPIO_INTERRUPT_SETUP_ENABLE_25                  0:0
-#define GPIO_INTERRUPT_SETUP_ENABLE_25_GPIO             0
-#define GPIO_INTERRUPT_SETUP_ENABLE_25_INTERRUPT        1
+#define GPIO_INTERRUPT_SETUP_TRIGGER_31                 BIT(22)
+#define GPIO_INTERRUPT_SETUP_TRIGGER_30                 BIT(21)
+#define GPIO_INTERRUPT_SETUP_TRIGGER_29                 BIT(20)
+#define GPIO_INTERRUPT_SETUP_TRIGGER_28                 BIT(19)
+#define GPIO_INTERRUPT_SETUP_TRIGGER_27                 BIT(18)
+#define GPIO_INTERRUPT_SETUP_TRIGGER_26                 BIT(17)
+#define GPIO_INTERRUPT_SETUP_TRIGGER_25                 BIT(16)
+#define GPIO_INTERRUPT_SETUP_ACTIVE_31                  BIT(14)
+#define GPIO_INTERRUPT_SETUP_ACTIVE_30                  BIT(13)
+#define GPIO_INTERRUPT_SETUP_ACTIVE_29                  BIT(12)
+#define GPIO_INTERRUPT_SETUP_ACTIVE_28                  BIT(11)
+#define GPIO_INTERRUPT_SETUP_ACTIVE_27                  BIT(10)
+#define GPIO_INTERRUPT_SETUP_ACTIVE_26                  BIT(9)
+#define GPIO_INTERRUPT_SETUP_ACTIVE_25                  BIT(8)
+#define GPIO_INTERRUPT_SETUP_ENABLE_31                  BIT(6)
+#define GPIO_INTERRUPT_SETUP_ENABLE_30                  BIT(5)
+#define GPIO_INTERRUPT_SETUP_ENABLE_29                  BIT(4)
+#define GPIO_INTERRUPT_SETUP_ENABLE_28                  BIT(3)
+#define GPIO_INTERRUPT_SETUP_ENABLE_27                  BIT(2)
+#define GPIO_INTERRUPT_SETUP_ENABLE_26                  BIT(1)
+#define GPIO_INTERRUPT_SETUP_ENABLE_25                  BIT(0)
 
 #define GPIO_INTERRUPT_STATUS                           0x01000C
-#define GPIO_INTERRUPT_STATUS_31                        22:22
-#define GPIO_INTERRUPT_STATUS_31_INACTIVE               0
-#define GPIO_INTERRUPT_STATUS_31_ACTIVE                 1
-#define GPIO_INTERRUPT_STATUS_31_RESET                  1
-#define GPIO_INTERRUPT_STATUS_30                        21:21
-#define GPIO_INTERRUPT_STATUS_30_INACTIVE               0
-#define GPIO_INTERRUPT_STATUS_30_ACTIVE                 1
-#define GPIO_INTERRUPT_STATUS_30_RESET                  1
-#define GPIO_INTERRUPT_STATUS_29                        20:20
-#define GPIO_INTERRUPT_STATUS_29_INACTIVE               0
-#define GPIO_INTERRUPT_STATUS_29_ACTIVE                 1
-#define GPIO_INTERRUPT_STATUS_29_RESET                  1
-#define GPIO_INTERRUPT_STATUS_28                        19:19
-#define GPIO_INTERRUPT_STATUS_28_INACTIVE               0
-#define GPIO_INTERRUPT_STATUS_28_ACTIVE                 1
-#define GPIO_INTERRUPT_STATUS_28_RESET                  1
-#define GPIO_INTERRUPT_STATUS_27                        18:18
-#define GPIO_INTERRUPT_STATUS_27_INACTIVE               0
-#define GPIO_INTERRUPT_STATUS_27_ACTIVE                 1
-#define GPIO_INTERRUPT_STATUS_27_RESET                  1
-#define GPIO_INTERRUPT_STATUS_26                        17:17
-#define GPIO_INTERRUPT_STATUS_26_INACTIVE               0
-#define GPIO_INTERRUPT_STATUS_26_ACTIVE                 1
-#define GPIO_INTERRUPT_STATUS_26_RESET                  1
-#define GPIO_INTERRUPT_STATUS_25                        16:16
-#define GPIO_INTERRUPT_STATUS_25_INACTIVE               0
-#define GPIO_INTERRUPT_STATUS_25_ACTIVE                 1
-#define GPIO_INTERRUPT_STATUS_25_RESET                  1
+#define GPIO_INTERRUPT_STATUS_31                        BIT(22)
+#define GPIO_INTERRUPT_STATUS_30                        BIT(21)
+#define GPIO_INTERRUPT_STATUS_29                        BIT(20)
+#define GPIO_INTERRUPT_STATUS_28                        BIT(19)
+#define GPIO_INTERRUPT_STATUS_27                        BIT(18)
+#define GPIO_INTERRUPT_STATUS_26                        BIT(17)
+#define GPIO_INTERRUPT_STATUS_25                        BIT(16)
 
 
 #define PANEL_DISPLAY_CTRL                            0x080000
 /* Video Control */
 
 #define VIDEO_DISPLAY_CTRL                              0x080040
-#define VIDEO_DISPLAY_CTRL_LINE_BUFFER                  18:18
-#define VIDEO_DISPLAY_CTRL_LINE_BUFFER_DISABLE          0
-#define VIDEO_DISPLAY_CTRL_LINE_BUFFER_ENABLE           1
+#define VIDEO_DISPLAY_CTRL_LINE_BUFFER                  BIT(18)
 #define VIDEO_DISPLAY_CTRL_FIFO                         17:16
 #define VIDEO_DISPLAY_CTRL_FIFO_1                       0
 #define VIDEO_DISPLAY_CTRL_FIFO_3                       1
 #define VIDEO_DISPLAY_CTRL_FIFO_7                       2
 #define VIDEO_DISPLAY_CTRL_FIFO_11                      3
-#define VIDEO_DISPLAY_CTRL_BUFFER                       15:15
-#define VIDEO_DISPLAY_CTRL_BUFFER_0                     0
-#define VIDEO_DISPLAY_CTRL_BUFFER_1                     1
-#define VIDEO_DISPLAY_CTRL_CAPTURE                      14:14
-#define VIDEO_DISPLAY_CTRL_CAPTURE_DISABLE              0
-#define VIDEO_DISPLAY_CTRL_CAPTURE_ENABLE               1
-#define VIDEO_DISPLAY_CTRL_DOUBLE_BUFFER                13:13
-#define VIDEO_DISPLAY_CTRL_DOUBLE_BUFFER_DISABLE        0
-#define VIDEO_DISPLAY_CTRL_DOUBLE_BUFFER_ENABLE         1
-#define VIDEO_DISPLAY_CTRL_BYTE_SWAP                    12:12
-#define VIDEO_DISPLAY_CTRL_BYTE_SWAP_DISABLE            0
-#define VIDEO_DISPLAY_CTRL_BYTE_SWAP_ENABLE             1
-#define VIDEO_DISPLAY_CTRL_VERTICAL_SCALE               11:11
-#define VIDEO_DISPLAY_CTRL_VERTICAL_SCALE_NORMAL        0
-#define VIDEO_DISPLAY_CTRL_VERTICAL_SCALE_HALF          1
-#define VIDEO_DISPLAY_CTRL_HORIZONTAL_SCALE             10:10
-#define VIDEO_DISPLAY_CTRL_HORIZONTAL_SCALE_NORMAL      0
-#define VIDEO_DISPLAY_CTRL_HORIZONTAL_SCALE_HALF        1
-#define VIDEO_DISPLAY_CTRL_VERTICAL_MODE                9:9
-#define VIDEO_DISPLAY_CTRL_VERTICAL_MODE_REPLICATE      0
-#define VIDEO_DISPLAY_CTRL_VERTICAL_MODE_INTERPOLATE    1
-#define VIDEO_DISPLAY_CTRL_HORIZONTAL_MODE              8:8
-#define VIDEO_DISPLAY_CTRL_HORIZONTAL_MODE_REPLICATE    0
-#define VIDEO_DISPLAY_CTRL_HORIZONTAL_MODE_INTERPOLATE  1
+#define VIDEO_DISPLAY_CTRL_BUFFER                       BIT(15)
+#define VIDEO_DISPLAY_CTRL_CAPTURE                      BIT(14)
+#define VIDEO_DISPLAY_CTRL_DOUBLE_BUFFER                BIT(13)
+#define VIDEO_DISPLAY_CTRL_BYTE_SWAP                    BIT(12)
+#define VIDEO_DISPLAY_CTRL_VERTICAL_SCALE               BIT(11)
+#define VIDEO_DISPLAY_CTRL_HORIZONTAL_SCALE             BIT(10)
+#define VIDEO_DISPLAY_CTRL_VERTICAL_MODE                BIT(9)
+#define VIDEO_DISPLAY_CTRL_HORIZONTAL_MODE              BIT(8)
 #define VIDEO_DISPLAY_CTRL_PIXEL                        7:4
-#define VIDEO_DISPLAY_CTRL_GAMMA                        3:3
-#define VIDEO_DISPLAY_CTRL_GAMMA_DISABLE                0
-#define VIDEO_DISPLAY_CTRL_GAMMA_ENABLE                 1
+#define VIDEO_DISPLAY_CTRL_GAMMA                        BIT(3)
 #define VIDEO_DISPLAY_CTRL_FORMAT                       1:0
 #define VIDEO_DISPLAY_CTRL_FORMAT_8                     0
 #define VIDEO_DISPLAY_CTRL_FORMAT_16                    1
 #define VIDEO_DISPLAY_CTRL_FORMAT_YUV                   3
 
 #define VIDEO_FB_0_ADDRESS                            0x080044
-#define VIDEO_FB_0_ADDRESS_STATUS                     31:31
-#define VIDEO_FB_0_ADDRESS_STATUS_CURRENT             0
-#define VIDEO_FB_0_ADDRESS_STATUS_PENDING             1
-#define VIDEO_FB_0_ADDRESS_EXT                        27:27
-#define VIDEO_FB_0_ADDRESS_EXT_LOCAL                  0
-#define VIDEO_FB_0_ADDRESS_EXT_EXTERNAL               1
+#define VIDEO_FB_0_ADDRESS_STATUS                     BIT(31)
+#define VIDEO_FB_0_ADDRESS_EXT                        BIT(27)
 #define VIDEO_FB_0_ADDRESS_ADDRESS                    25:0
 
 #define VIDEO_FB_WIDTH                                0x080048
 #define VIDEO_FB_WIDTH_OFFSET                         13:0
 
 #define VIDEO_FB_0_LAST_ADDRESS                       0x08004C
-#define VIDEO_FB_0_LAST_ADDRESS_EXT                   27:27
-#define VIDEO_FB_0_LAST_ADDRESS_EXT_LOCAL             0
-#define VIDEO_FB_0_LAST_ADDRESS_EXT_EXTERNAL          1
+#define VIDEO_FB_0_LAST_ADDRESS_EXT                   BIT(27)
 #define VIDEO_FB_0_LAST_ADDRESS_ADDRESS               25:0
 
 #define VIDEO_PLANE_TL                                0x080050
 #define VIDEO_PLANE_BR_RIGHT                          10:0
 
 #define VIDEO_SCALE                                   0x080058
-#define VIDEO_SCALE_VERTICAL_MODE                     31:31
-#define VIDEO_SCALE_VERTICAL_MODE_EXPAND              0
-#define VIDEO_SCALE_VERTICAL_MODE_SHRINK              1
+#define VIDEO_SCALE_VERTICAL_MODE                     BIT(31)
 #define VIDEO_SCALE_VERTICAL_SCALE                    27:16
-#define VIDEO_SCALE_HORIZONTAL_MODE                   15:15
-#define VIDEO_SCALE_HORIZONTAL_MODE_EXPAND            0
-#define VIDEO_SCALE_HORIZONTAL_MODE_SHRINK            1
+#define VIDEO_SCALE_HORIZONTAL_MODE                   BIT(15)
 #define VIDEO_SCALE_HORIZONTAL_SCALE                  11:0
 
 #define VIDEO_INITIAL_SCALE                           0x08005C
 #define VIDEO_YUV_CONSTANTS_B                         7:0
 
 #define VIDEO_FB_1_ADDRESS                            0x080064
-#define VIDEO_FB_1_ADDRESS_STATUS                     31:31
-#define VIDEO_FB_1_ADDRESS_STATUS_CURRENT             0
-#define VIDEO_FB_1_ADDRESS_STATUS_PENDING             1
-#define VIDEO_FB_1_ADDRESS_EXT                        27:27
-#define VIDEO_FB_1_ADDRESS_EXT_LOCAL                  0
-#define VIDEO_FB_1_ADDRESS_EXT_EXTERNAL               1
+#define VIDEO_FB_1_ADDRESS_STATUS                     BIT(31)
+#define VIDEO_FB_1_ADDRESS_EXT                        BIT(27)
 #define VIDEO_FB_1_ADDRESS_ADDRESS                    25:0
 
 #define VIDEO_FB_1_LAST_ADDRESS                       0x080068
-#define VIDEO_FB_1_LAST_ADDRESS_EXT                   27:27
-#define VIDEO_FB_1_LAST_ADDRESS_EXT_LOCAL             0
-#define VIDEO_FB_1_LAST_ADDRESS_EXT_EXTERNAL          1
+#define VIDEO_FB_1_LAST_ADDRESS_EXT                   BIT(27)
 #define VIDEO_FB_1_LAST_ADDRESS_ADDRESS               25:0
 
 /* Video Alpha Control */
 
 #define VIDEO_ALPHA_DISPLAY_CTRL                        0x080080
-#define VIDEO_ALPHA_DISPLAY_CTRL_SELECT                 28:28
-#define VIDEO_ALPHA_DISPLAY_CTRL_SELECT_PER_PIXEL       0
-#define VIDEO_ALPHA_DISPLAY_CTRL_SELECT_ALPHA           1
+#define VIDEO_ALPHA_DISPLAY_CTRL_SELECT                 BIT(28)
 #define VIDEO_ALPHA_DISPLAY_CTRL_ALPHA                  27:24
 #define VIDEO_ALPHA_DISPLAY_CTRL_FIFO                   17:16
 #define VIDEO_ALPHA_DISPLAY_CTRL_FIFO_1                 0
 #define VIDEO_ALPHA_DISPLAY_CTRL_FIFO_3                 1
 #define VIDEO_ALPHA_DISPLAY_CTRL_FIFO_7                 2
 #define VIDEO_ALPHA_DISPLAY_CTRL_FIFO_11                3
-#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_SCALE             11:11
-#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_SCALE_NORMAL      0
-#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_SCALE_HALF        1
-#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_SCALE             10:10
-#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_SCALE_NORMAL      0
-#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_SCALE_HALF        1
-#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_MODE              9:9
-#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_MODE_REPLICATE    0
-#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_MODE_INTERPOLATE  1
-#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_MODE              8:8
-#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_MODE_REPLICATE    0
-#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_MODE_INTERPOLATE  1
+#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_SCALE             BIT(11)
+#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_SCALE             BIT(10)
+#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_MODE              BIT(9)
+#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_MODE              BIT(8)
 #define VIDEO_ALPHA_DISPLAY_CTRL_PIXEL                  7:4
-#define VIDEO_ALPHA_DISPLAY_CTRL_CHROMA_KEY             3:3
-#define VIDEO_ALPHA_DISPLAY_CTRL_CHROMA_KEY_DISABLE     0
-#define VIDEO_ALPHA_DISPLAY_CTRL_CHROMA_KEY_ENABLE      1
+#define VIDEO_ALPHA_DISPLAY_CTRL_CHROMA_KEY             BIT(3)
 #define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT                 1:0
 #define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT_8               0
 #define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT_16              1
 #define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT_ALPHA_4_4_4_4   3
 
 #define VIDEO_ALPHA_FB_ADDRESS                        0x080084
-#define VIDEO_ALPHA_FB_ADDRESS_STATUS                 31:31
-#define VIDEO_ALPHA_FB_ADDRESS_STATUS_CURRENT         0
-#define VIDEO_ALPHA_FB_ADDRESS_STATUS_PENDING         1
-#define VIDEO_ALPHA_FB_ADDRESS_EXT                    27:27
-#define VIDEO_ALPHA_FB_ADDRESS_EXT_LOCAL              0
-#define VIDEO_ALPHA_FB_ADDRESS_EXT_EXTERNAL           1
+#define VIDEO_ALPHA_FB_ADDRESS_STATUS                 BIT(31)
+#define VIDEO_ALPHA_FB_ADDRESS_EXT                    BIT(27)
 #define VIDEO_ALPHA_FB_ADDRESS_ADDRESS                25:0
 
 #define VIDEO_ALPHA_FB_WIDTH                          0x080088
 #define VIDEO_ALPHA_FB_WIDTH_OFFSET                   13:0
 
 #define VIDEO_ALPHA_FB_LAST_ADDRESS                   0x08008C
-#define VIDEO_ALPHA_FB_LAST_ADDRESS_EXT               27:27
-#define VIDEO_ALPHA_FB_LAST_ADDRESS_EXT_LOCAL         0
-#define VIDEO_ALPHA_FB_LAST_ADDRESS_EXT_EXTERNAL      1
+#define VIDEO_ALPHA_FB_LAST_ADDRESS_EXT               BIT(27)
 #define VIDEO_ALPHA_FB_LAST_ADDRESS_ADDRESS           25:0
 
 #define VIDEO_ALPHA_PLANE_TL                          0x080090
 #define VIDEO_ALPHA_PLANE_BR_RIGHT                    10:0
 
 #define VIDEO_ALPHA_SCALE                             0x080098
-#define VIDEO_ALPHA_SCALE_VERTICAL_MODE               31:31
-#define VIDEO_ALPHA_SCALE_VERTICAL_MODE_EXPAND        0
-#define VIDEO_ALPHA_SCALE_VERTICAL_MODE_SHRINK        1
+#define VIDEO_ALPHA_SCALE_VERTICAL_MODE               BIT(31)
 #define VIDEO_ALPHA_SCALE_VERTICAL_SCALE              27:16
-#define VIDEO_ALPHA_SCALE_HORIZONTAL_MODE             15:15
-#define VIDEO_ALPHA_SCALE_HORIZONTAL_MODE_EXPAND      0
-#define VIDEO_ALPHA_SCALE_HORIZONTAL_MODE_SHRINK      1
+#define VIDEO_ALPHA_SCALE_HORIZONTAL_MODE             BIT(15)
 #define VIDEO_ALPHA_SCALE_HORIZONTAL_SCALE            11:0
 
 #define VIDEO_ALPHA_INITIAL_SCALE                     0x08009C
 /* Panel Cursor Control */
 
 #define PANEL_HWC_ADDRESS                             0x0800F0
-#define PANEL_HWC_ADDRESS_ENABLE                      31:31
-#define PANEL_HWC_ADDRESS_ENABLE_DISABLE              0
-#define PANEL_HWC_ADDRESS_ENABLE_ENABLE               1
-#define PANEL_HWC_ADDRESS_EXT                         27:27
-#define PANEL_HWC_ADDRESS_EXT_LOCAL                   0
-#define PANEL_HWC_ADDRESS_EXT_EXTERNAL                1
+#define PANEL_HWC_ADDRESS_ENABLE                      BIT(31)
+#define PANEL_HWC_ADDRESS_EXT                         BIT(27)
 #define PANEL_HWC_ADDRESS_ADDRESS                     25:0
 
 #define PANEL_HWC_LOCATION                            0x0800F4
-#define PANEL_HWC_LOCATION_TOP                        27:27
-#define PANEL_HWC_LOCATION_TOP_INSIDE                 0
-#define PANEL_HWC_LOCATION_TOP_OUTSIDE                1
+#define PANEL_HWC_LOCATION_TOP                        BIT(27)
 #define PANEL_HWC_LOCATION_Y                          26:16
-#define PANEL_HWC_LOCATION_LEFT                       11:11
-#define PANEL_HWC_LOCATION_LEFT_INSIDE                0
-#define PANEL_HWC_LOCATION_LEFT_OUTSIDE               1
+#define PANEL_HWC_LOCATION_LEFT                       BIT(11)
 #define PANEL_HWC_LOCATION_X                          10:0
 
 #define PANEL_HWC_COLOR_12                            0x0800F8
 /* Alpha Control */
 
 #define ALPHA_DISPLAY_CTRL                            0x080100
-#define ALPHA_DISPLAY_CTRL_SELECT                     28:28
-#define ALPHA_DISPLAY_CTRL_SELECT_PER_PIXEL           0
-#define ALPHA_DISPLAY_CTRL_SELECT_ALPHA               1
+#define ALPHA_DISPLAY_CTRL_SELECT                     BIT(28)
 #define ALPHA_DISPLAY_CTRL_ALPHA                      27:24
 #define ALPHA_DISPLAY_CTRL_FIFO                       17:16
 #define ALPHA_DISPLAY_CTRL_FIFO_1                     0
 #define ALPHA_DISPLAY_CTRL_FIFO_7                     2
 #define ALPHA_DISPLAY_CTRL_FIFO_11                    3
 #define ALPHA_DISPLAY_CTRL_PIXEL                      7:4
-#define ALPHA_DISPLAY_CTRL_CHROMA_KEY                 3:3
-#define ALPHA_DISPLAY_CTRL_CHROMA_KEY_DISABLE         0
-#define ALPHA_DISPLAY_CTRL_CHROMA_KEY_ENABLE          1
+#define ALPHA_DISPLAY_CTRL_CHROMA_KEY                 BIT(3)
 #define ALPHA_DISPLAY_CTRL_FORMAT                     1:0
 #define ALPHA_DISPLAY_CTRL_FORMAT_16                  1
 #define ALPHA_DISPLAY_CTRL_FORMAT_ALPHA_4_4           2
 #define ALPHA_DISPLAY_CTRL_FORMAT_ALPHA_4_4_4_4       3
 
 #define ALPHA_FB_ADDRESS                              0x080104
-#define ALPHA_FB_ADDRESS_STATUS                       31:31
-#define ALPHA_FB_ADDRESS_STATUS_CURRENT               0
-#define ALPHA_FB_ADDRESS_STATUS_PENDING               1
-#define ALPHA_FB_ADDRESS_EXT                          27:27
-#define ALPHA_FB_ADDRESS_EXT_LOCAL                    0
-#define ALPHA_FB_ADDRESS_EXT_EXTERNAL                 1
+#define ALPHA_FB_ADDRESS_STATUS                       BIT(31)
+#define ALPHA_FB_ADDRESS_EXT                          BIT(27)
 #define ALPHA_FB_ADDRESS_ADDRESS                      25:0
 
 #define ALPHA_FB_WIDTH                                0x080108
 
 #define CRT_SIGNATURE_ANALYZER                        0x08021C
 #define CRT_SIGNATURE_ANALYZER_STATUS                 31:16
-#define CRT_SIGNATURE_ANALYZER_ENABLE                 3:3
-#define CRT_SIGNATURE_ANALYZER_ENABLE_DISABLE         0
-#define CRT_SIGNATURE_ANALYZER_ENABLE_ENABLE          1
-#define CRT_SIGNATURE_ANALYZER_RESET                  2:2
-#define CRT_SIGNATURE_ANALYZER_RESET_NORMAL           0
-#define CRT_SIGNATURE_ANALYZER_RESET_RESET            1
+#define CRT_SIGNATURE_ANALYZER_ENABLE                 BIT(3)
+#define CRT_SIGNATURE_ANALYZER_RESET                  BIT(2)
 #define CRT_SIGNATURE_ANALYZER_SOURCE                 1:0
 #define CRT_SIGNATURE_ANALYZER_SOURCE_RED             0
 #define CRT_SIGNATURE_ANALYZER_SOURCE_GREEN           1
 #define CRT_CURRENT_LINE_LINE                         10:0
 
 #define CRT_MONITOR_DETECT                            0x080224
-#define CRT_MONITOR_DETECT_VALUE                      25:25
-#define CRT_MONITOR_DETECT_VALUE_DISABLE              0
-#define CRT_MONITOR_DETECT_VALUE_ENABLE               1
-#define CRT_MONITOR_DETECT_ENABLE                     24:24
-#define CRT_MONITOR_DETECT_ENABLE_DISABLE             0
-#define CRT_MONITOR_DETECT_ENABLE_ENABLE              1
+#define CRT_MONITOR_DETECT_VALUE                      BIT(25)
+#define CRT_MONITOR_DETECT_ENABLE                     BIT(24)
 #define CRT_MONITOR_DETECT_RED                        23:16
 #define CRT_MONITOR_DETECT_GREEN                      15:8
 #define CRT_MONITOR_DETECT_BLUE                       7:0
 
 #define CRT_SCALE                                     0x080228
-#define CRT_SCALE_VERTICAL_MODE                       31:31
-#define CRT_SCALE_VERTICAL_MODE_EXPAND                0
-#define CRT_SCALE_VERTICAL_MODE_SHRINK                1
+#define CRT_SCALE_VERTICAL_MODE                       BIT(31)
 #define CRT_SCALE_VERTICAL_SCALE                      27:16
-#define CRT_SCALE_HORIZONTAL_MODE                     15:15
-#define CRT_SCALE_HORIZONTAL_MODE_EXPAND              0
-#define CRT_SCALE_HORIZONTAL_MODE_SHRINK              1
+#define CRT_SCALE_HORIZONTAL_MODE                     BIT(15)
 #define CRT_SCALE_HORIZONTAL_SCALE                    11:0
 
 /* CRT Cursor Control */
 
 #define CRT_HWC_ADDRESS                               0x080230
-#define CRT_HWC_ADDRESS_ENABLE                        31:31
-#define CRT_HWC_ADDRESS_ENABLE_DISABLE                0
-#define CRT_HWC_ADDRESS_ENABLE_ENABLE                 1
-#define CRT_HWC_ADDRESS_EXT                           27:27
-#define CRT_HWC_ADDRESS_EXT_LOCAL                     0
-#define CRT_HWC_ADDRESS_EXT_EXTERNAL                  1
+#define CRT_HWC_ADDRESS_ENABLE                        BIT(31)
+#define CRT_HWC_ADDRESS_EXT                           BIT(27)
 #define CRT_HWC_ADDRESS_ADDRESS                       25:0
 
 #define CRT_HWC_LOCATION                              0x080234
-#define CRT_HWC_LOCATION_TOP                          27:27
-#define CRT_HWC_LOCATION_TOP_INSIDE                   0
-#define CRT_HWC_LOCATION_TOP_OUTSIDE                  1
+#define CRT_HWC_LOCATION_TOP                          BIT(27)
 #define CRT_HWC_LOCATION_Y                            26:16
-#define CRT_HWC_LOCATION_LEFT                         11:11
-#define CRT_HWC_LOCATION_LEFT_INSIDE                  0
-#define CRT_HWC_LOCATION_LEFT_OUTSIDE                 1
+#define CRT_HWC_LOCATION_LEFT                         BIT(11)
 #define CRT_HWC_LOCATION_X                            10:0
 
 #define CRT_HWC_COLOR_12                              0x080238
 /* Color Space Conversion registers. */
 
 #define CSC_Y_SOURCE_BASE                               0x1000C8
-#define CSC_Y_SOURCE_BASE_EXT                           27:27
-#define CSC_Y_SOURCE_BASE_EXT_LOCAL                     0
-#define CSC_Y_SOURCE_BASE_EXT_EXTERNAL                  1
-#define CSC_Y_SOURCE_BASE_CS                            26:26
-#define CSC_Y_SOURCE_BASE_CS_0                          0
-#define CSC_Y_SOURCE_BASE_CS_1                          1
+#define CSC_Y_SOURCE_BASE_EXT                           BIT(27)
+#define CSC_Y_SOURCE_BASE_CS                            BIT(26)
 #define CSC_Y_SOURCE_BASE_ADDRESS                       25:0
 
 #define CSC_CONSTANTS                                   0x1000CC
 #define CSC_Y_SOURCE_Y_FRACTION                         15:3
 
 #define CSC_U_SOURCE_BASE                               0x1000D8
-#define CSC_U_SOURCE_BASE_EXT                           27:27
-#define CSC_U_SOURCE_BASE_EXT_LOCAL                     0
-#define CSC_U_SOURCE_BASE_EXT_EXTERNAL                  1
-#define CSC_U_SOURCE_BASE_CS                            26:26
-#define CSC_U_SOURCE_BASE_CS_0                          0
-#define CSC_U_SOURCE_BASE_CS_1                          1
+#define CSC_U_SOURCE_BASE_EXT                           BIT(27)
+#define CSC_U_SOURCE_BASE_CS                            BIT(26)
 #define CSC_U_SOURCE_BASE_ADDRESS                       25:0
 
 #define CSC_V_SOURCE_BASE                               0x1000DC
-#define CSC_V_SOURCE_BASE_EXT                           27:27
-#define CSC_V_SOURCE_BASE_EXT_LOCAL                     0
-#define CSC_V_SOURCE_BASE_EXT_EXTERNAL                  1
-#define CSC_V_SOURCE_BASE_CS                            26:26
-#define CSC_V_SOURCE_BASE_CS_0                          0
-#define CSC_V_SOURCE_BASE_CS_1                          1
+#define CSC_V_SOURCE_BASE_EXT                           BIT(27)
+#define CSC_V_SOURCE_BASE_CS                            BIT(26)
 #define CSC_V_SOURCE_BASE_ADDRESS                       25:0
 
 #define CSC_SOURCE_DIMENSION                            0x1000E0
 #define CSC_SOURCE_PITCH_UV                             15:0
 
 #define CSC_DESTINATION                                 0x1000E8
-#define CSC_DESTINATION_WRAP                            31:31
-#define CSC_DESTINATION_WRAP_DISABLE                    0
-#define CSC_DESTINATION_WRAP_ENABLE                     1
+#define CSC_DESTINATION_WRAP                            BIT(31)
 #define CSC_DESTINATION_X                               27:16
 #define CSC_DESTINATION_Y                               11:0
 
 #define CSC_SCALE_FACTOR_VERTICAL                       15:0
 
 #define CSC_DESTINATION_BASE                            0x1000F8
-#define CSC_DESTINATION_BASE_EXT                        27:27
-#define CSC_DESTINATION_BASE_EXT_LOCAL                  0
-#define CSC_DESTINATION_BASE_EXT_EXTERNAL               1
-#define CSC_DESTINATION_BASE_CS                         26:26
-#define CSC_DESTINATION_BASE_CS_0                       0
-#define CSC_DESTINATION_BASE_CS_1                       1
+#define CSC_DESTINATION_BASE_EXT                        BIT(27)
+#define CSC_DESTINATION_BASE_CS                         BIT(26)
 #define CSC_DESTINATION_BASE_ADDRESS                    25:0
 
 #define CSC_CONTROL                                     0x1000FC
-#define CSC_CONTROL_STATUS                              31:31
-#define CSC_CONTROL_STATUS_STOP                         0
-#define CSC_CONTROL_STATUS_START                        1
+#define CSC_CONTROL_STATUS                              BIT(31)
 #define CSC_CONTROL_SOURCE_FORMAT                       30:28
 #define CSC_CONTROL_SOURCE_FORMAT_YUV422                0
 #define CSC_CONTROL_SOURCE_FORMAT_YUV420I               1
 #define CSC_CONTROL_DESTINATION_FORMAT                  27:26
 #define CSC_CONTROL_DESTINATION_FORMAT_RGB565           0
 #define CSC_CONTROL_DESTINATION_FORMAT_RGB8888          1
-#define CSC_CONTROL_HORIZONTAL_FILTER                   25:25
-#define CSC_CONTROL_HORIZONTAL_FILTER_DISABLE           0
-#define CSC_CONTROL_HORIZONTAL_FILTER_ENABLE            1
-#define CSC_CONTROL_VERTICAL_FILTER                     24:24
-#define CSC_CONTROL_VERTICAL_FILTER_DISABLE             0
-#define CSC_CONTROL_VERTICAL_FILTER_ENABLE              1
-#define CSC_CONTROL_BYTE_ORDER                          23:23
-#define CSC_CONTROL_BYTE_ORDER_YUYV                     0
-#define CSC_CONTROL_BYTE_ORDER_UYVY                     1
+#define CSC_CONTROL_HORIZONTAL_FILTER                   BIT(25)
+#define CSC_CONTROL_VERTICAL_FILTER                     BIT(24)
+#define CSC_CONTROL_BYTE_ORDER                          BIT(23)
 
 #define DE_DATA_PORT                                    0x110000
 
 #define I2C_STATUS_BSY                                  BIT(0)
 
 #define I2C_RESET                                       0x010042
-#define I2C_RESET_BUS_ERROR                             2:2
-#define I2C_RESET_BUS_ERROR_CLEAR                       0
+#define I2C_RESET_BUS_ERROR                             BIT(2)
 
 #define I2C_SLAVE_ADDRESS                               0x010043
 #define I2C_SLAVE_ADDRESS_ADDRESS                       7:1
-#define I2C_SLAVE_ADDRESS_RW                            0:0
-#define I2C_SLAVE_ADDRESS_RW_W                          0
-#define I2C_SLAVE_ADDRESS_RW_R                          1
+#define I2C_SLAVE_ADDRESS_RW                            BIT(0)
 
 #define I2C_DATA0                                       0x010044
 #define I2C_DATA1                                       0x010045
 
 
 #define ZV0_CAPTURE_CTRL                                0x090000
-#define ZV0_CAPTURE_CTRL_FIELD_INPUT                    27:27
-#define ZV0_CAPTURE_CTRL_FIELD_INPUT_EVEN_FIELD         0
-#define ZV0_CAPTURE_CTRL_FIELD_INPUT_ODD_FIELD          1
-#define ZV0_CAPTURE_CTRL_SCAN                           26:26
-#define ZV0_CAPTURE_CTRL_SCAN_PROGRESSIVE               0
-#define ZV0_CAPTURE_CTRL_SCAN_INTERLACE                 1
-#define ZV0_CAPTURE_CTRL_CURRENT_BUFFER                 25:25
-#define ZV0_CAPTURE_CTRL_CURRENT_BUFFER_0               0
-#define ZV0_CAPTURE_CTRL_CURRENT_BUFFER_1               1
-#define ZV0_CAPTURE_CTRL_VERTICAL_SYNC                  24:24
-#define ZV0_CAPTURE_CTRL_VERTICAL_SYNC_INACTIVE         0
-#define ZV0_CAPTURE_CTRL_VERTICAL_SYNC_ACTIVE           1
-#define ZV0_CAPTURE_CTRL_ADJ                            19:19
-#define ZV0_CAPTURE_CTRL_ADJ_NORMAL                     0
-#define ZV0_CAPTURE_CTRL_ADJ_DELAY                      1
-#define ZV0_CAPTURE_CTRL_HA                             18:18
-#define ZV0_CAPTURE_CTRL_HA_DISABLE                     0
-#define ZV0_CAPTURE_CTRL_HA_ENABLE                      1
-#define ZV0_CAPTURE_CTRL_VSK                            17:17
-#define ZV0_CAPTURE_CTRL_VSK_DISABLE                    0
-#define ZV0_CAPTURE_CTRL_VSK_ENABLE                     1
-#define ZV0_CAPTURE_CTRL_HSK                            16:16
-#define ZV0_CAPTURE_CTRL_HSK_DISABLE                    0
-#define ZV0_CAPTURE_CTRL_HSK_ENABLE                     1
-#define ZV0_CAPTURE_CTRL_FD                             15:15
-#define ZV0_CAPTURE_CTRL_FD_RISING                      0
-#define ZV0_CAPTURE_CTRL_FD_FALLING                     1
-#define ZV0_CAPTURE_CTRL_VP                             14:14
-#define ZV0_CAPTURE_CTRL_VP_HIGH                        0
-#define ZV0_CAPTURE_CTRL_VP_LOW                         1
-#define ZV0_CAPTURE_CTRL_HP                             13:13
-#define ZV0_CAPTURE_CTRL_HP_HIGH                        0
-#define ZV0_CAPTURE_CTRL_HP_LOW                         1
-#define ZV0_CAPTURE_CTRL_CP                             12:12
-#define ZV0_CAPTURE_CTRL_CP_HIGH                        0
-#define ZV0_CAPTURE_CTRL_CP_LOW                         1
-#define ZV0_CAPTURE_CTRL_UVS                            11:11
-#define ZV0_CAPTURE_CTRL_UVS_DISABLE                    0
-#define ZV0_CAPTURE_CTRL_UVS_ENABLE                     1
-#define ZV0_CAPTURE_CTRL_BS                             10:10
-#define ZV0_CAPTURE_CTRL_BS_DISABLE                     0
-#define ZV0_CAPTURE_CTRL_BS_ENABLE                      1
-#define ZV0_CAPTURE_CTRL_CS                             9:9
-#define ZV0_CAPTURE_CTRL_CS_16                          0
-#define ZV0_CAPTURE_CTRL_CS_8                           1
-#define ZV0_CAPTURE_CTRL_CF                             8:8
-#define ZV0_CAPTURE_CTRL_CF_YUV                         0
-#define ZV0_CAPTURE_CTRL_CF_RGB                         1
-#define ZV0_CAPTURE_CTRL_FS                             7:7
-#define ZV0_CAPTURE_CTRL_FS_DISABLE                     0
-#define ZV0_CAPTURE_CTRL_FS_ENABLE                      1
-#define ZV0_CAPTURE_CTRL_WEAVE                          6:6
-#define ZV0_CAPTURE_CTRL_WEAVE_DISABLE                  0
-#define ZV0_CAPTURE_CTRL_WEAVE_ENABLE                   1
-#define ZV0_CAPTURE_CTRL_BOB                            5:5
-#define ZV0_CAPTURE_CTRL_BOB_DISABLE                    0
-#define ZV0_CAPTURE_CTRL_BOB_ENABLE                     1
-#define ZV0_CAPTURE_CTRL_DB                             4:4
-#define ZV0_CAPTURE_CTRL_DB_DISABLE                     0
-#define ZV0_CAPTURE_CTRL_DB_ENABLE                      1
-#define ZV0_CAPTURE_CTRL_CC                             3:3
-#define ZV0_CAPTURE_CTRL_CC_CONTINUE                    0
-#define ZV0_CAPTURE_CTRL_CC_CONDITION                   1
-#define ZV0_CAPTURE_CTRL_RGB                            2:2
-#define ZV0_CAPTURE_CTRL_RGB_DISABLE                    0
-#define ZV0_CAPTURE_CTRL_RGB_ENABLE                     1
-#define ZV0_CAPTURE_CTRL_656                            1:1
-#define ZV0_CAPTURE_CTRL_656_DISABLE                    0
-#define ZV0_CAPTURE_CTRL_656_ENABLE                     1
-#define ZV0_CAPTURE_CTRL_CAP                            0:0
-#define ZV0_CAPTURE_CTRL_CAP_DISABLE                    0
-#define ZV0_CAPTURE_CTRL_CAP_ENABLE                     1
+#define ZV0_CAPTURE_CTRL_FIELD_INPUT                    BIT(27)
+#define ZV0_CAPTURE_CTRL_SCAN                           BIT(26)
+#define ZV0_CAPTURE_CTRL_CURRENT_BUFFER                 BIT(25)
+#define ZV0_CAPTURE_CTRL_VERTICAL_SYNC                  BIT(24)
+#define ZV0_CAPTURE_CTRL_ADJ                            BIT(19)
+#define ZV0_CAPTURE_CTRL_HA                             BIT(18)
+#define ZV0_CAPTURE_CTRL_VSK                            BIT(17)
+#define ZV0_CAPTURE_CTRL_HSK                            BIT(16)
+#define ZV0_CAPTURE_CTRL_FD                             BIT(15)
+#define ZV0_CAPTURE_CTRL_VP                             BIT(14)
+#define ZV0_CAPTURE_CTRL_HP                             BIT(13)
+#define ZV0_CAPTURE_CTRL_CP                             BIT(12)
+#define ZV0_CAPTURE_CTRL_UVS                            BIT(11)
+#define ZV0_CAPTURE_CTRL_BS                             BIT(10)
+#define ZV0_CAPTURE_CTRL_CS                             BIT(9)
+#define ZV0_CAPTURE_CTRL_CF                             BIT(8)
+#define ZV0_CAPTURE_CTRL_FS                             BIT(7)
+#define ZV0_CAPTURE_CTRL_WEAVE                          BIT(6)
+#define ZV0_CAPTURE_CTRL_BOB                            BIT(5)
+#define ZV0_CAPTURE_CTRL_DB                             BIT(4)
+#define ZV0_CAPTURE_CTRL_CC                             BIT(3)
+#define ZV0_CAPTURE_CTRL_RGB                            BIT(2)
+#define ZV0_CAPTURE_CTRL_656                            BIT(1)
+#define ZV0_CAPTURE_CTRL_CAP                            BIT(0)
 
 #define ZV0_CAPTURE_CLIP                                0x090004
 #define ZV0_CAPTURE_CLIP_YCLIP_EVEN_FIELD                25:16
 #define ZV0_CAPTURE_SIZE_WIDTH                          10:0
 
 #define ZV0_CAPTURE_BUF0_ADDRESS                        0x09000C
-#define ZV0_CAPTURE_BUF0_ADDRESS_STATUS                 31:31
-#define ZV0_CAPTURE_BUF0_ADDRESS_STATUS_CURRENT         0
-#define ZV0_CAPTURE_BUF0_ADDRESS_STATUS_PENDING         1
-#define ZV0_CAPTURE_BUF0_ADDRESS_EXT                    27:27
-#define ZV0_CAPTURE_BUF0_ADDRESS_EXT_LOCAL              0
-#define ZV0_CAPTURE_BUF0_ADDRESS_EXT_EXTERNAL           1
-#define ZV0_CAPTURE_BUF0_ADDRESS_CS                     26:26
-#define ZV0_CAPTURE_BUF0_ADDRESS_CS_0                   0
-#define ZV0_CAPTURE_BUF0_ADDRESS_CS_1                   1
+#define ZV0_CAPTURE_BUF0_ADDRESS_STATUS                 BIT(31)
+#define ZV0_CAPTURE_BUF0_ADDRESS_EXT                    BIT(27)
+#define ZV0_CAPTURE_BUF0_ADDRESS_CS                     BIT(26)
 #define ZV0_CAPTURE_BUF0_ADDRESS_ADDRESS                25:0
 
 #define ZV0_CAPTURE_BUF1_ADDRESS                        0x090010
-#define ZV0_CAPTURE_BUF1_ADDRESS_STATUS                 31:31
-#define ZV0_CAPTURE_BUF1_ADDRESS_STATUS_CURRENT         0
-#define ZV0_CAPTURE_BUF1_ADDRESS_STATUS_PENDING         1
-#define ZV0_CAPTURE_BUF1_ADDRESS_EXT                    27:27
-#define ZV0_CAPTURE_BUF1_ADDRESS_EXT_LOCAL              0
-#define ZV0_CAPTURE_BUF1_ADDRESS_EXT_EXTERNAL           1
-#define ZV0_CAPTURE_BUF1_ADDRESS_CS                     26:26
-#define ZV0_CAPTURE_BUF1_ADDRESS_CS_0                   0
-#define ZV0_CAPTURE_BUF1_ADDRESS_CS_1                   1
+#define ZV0_CAPTURE_BUF1_ADDRESS_STATUS                 BIT(31)
+#define ZV0_CAPTURE_BUF1_ADDRESS_EXT                    BIT(27)
+#define ZV0_CAPTURE_BUF1_ADDRESS_CS                     BIT(26)
 #define ZV0_CAPTURE_BUF1_ADDRESS_ADDRESS                25:0
 
 #define ZV0_CAPTURE_BUF_OFFSET                          0x090014
 /* ZV1 */
 
 #define ZV1_CAPTURE_CTRL                                0x098000
-#define ZV1_CAPTURE_CTRL_FIELD_INPUT                    27:27
-#define ZV1_CAPTURE_CTRL_FIELD_INPUT_EVEN_FIELD         0
-#define ZV1_CAPTURE_CTRL_FIELD_INPUT_ODD_FIELD          0
-#define ZV1_CAPTURE_CTRL_SCAN                           26:26
-#define ZV1_CAPTURE_CTRL_SCAN_PROGRESSIVE               0
-#define ZV1_CAPTURE_CTRL_SCAN_INTERLACE                 1
-#define ZV1_CAPTURE_CTRL_CURRENT_BUFFER                 25:25
-#define ZV1_CAPTURE_CTRL_CURRENT_BUFFER_0               0
-#define ZV1_CAPTURE_CTRL_CURRENT_BUFFER_1               1
-#define ZV1_CAPTURE_CTRL_VERTICAL_SYNC                  24:24
-#define ZV1_CAPTURE_CTRL_VERTICAL_SYNC_INACTIVE         0
-#define ZV1_CAPTURE_CTRL_VERTICAL_SYNC_ACTIVE           1
-#define ZV1_CAPTURE_CTRL_PANEL                          20:20
-#define ZV1_CAPTURE_CTRL_PANEL_DISABLE                  0
-#define ZV1_CAPTURE_CTRL_PANEL_ENABLE                   1
-#define ZV1_CAPTURE_CTRL_ADJ                            19:19
-#define ZV1_CAPTURE_CTRL_ADJ_NORMAL                     0
-#define ZV1_CAPTURE_CTRL_ADJ_DELAY                      1
-#define ZV1_CAPTURE_CTRL_HA                             18:18
-#define ZV1_CAPTURE_CTRL_HA_DISABLE                     0
-#define ZV1_CAPTURE_CTRL_HA_ENABLE                      1
-#define ZV1_CAPTURE_CTRL_VSK                            17:17
-#define ZV1_CAPTURE_CTRL_VSK_DISABLE                    0
-#define ZV1_CAPTURE_CTRL_VSK_ENABLE                     1
-#define ZV1_CAPTURE_CTRL_HSK                            16:16
-#define ZV1_CAPTURE_CTRL_HSK_DISABLE                    0
-#define ZV1_CAPTURE_CTRL_HSK_ENABLE                     1
-#define ZV1_CAPTURE_CTRL_FD                             15:15
-#define ZV1_CAPTURE_CTRL_FD_RISING                      0
-#define ZV1_CAPTURE_CTRL_FD_FALLING                     1
-#define ZV1_CAPTURE_CTRL_VP                             14:14
-#define ZV1_CAPTURE_CTRL_VP_HIGH                        0
-#define ZV1_CAPTURE_CTRL_VP_LOW                         1
-#define ZV1_CAPTURE_CTRL_HP                             13:13
-#define ZV1_CAPTURE_CTRL_HP_HIGH                        0
-#define ZV1_CAPTURE_CTRL_HP_LOW                         1
-#define ZV1_CAPTURE_CTRL_CP                             12:12
-#define ZV1_CAPTURE_CTRL_CP_HIGH                        0
-#define ZV1_CAPTURE_CTRL_CP_LOW                         1
-#define ZV1_CAPTURE_CTRL_UVS                            11:11
-#define ZV1_CAPTURE_CTRL_UVS_DISABLE                    0
-#define ZV1_CAPTURE_CTRL_UVS_ENABLE                     1
-#define ZV1_CAPTURE_CTRL_BS                             10:10
-#define ZV1_CAPTURE_CTRL_BS_DISABLE                     0
-#define ZV1_CAPTURE_CTRL_BS_ENABLE                      1
-#define ZV1_CAPTURE_CTRL_CS                             9:9
-#define ZV1_CAPTURE_CTRL_CS_16                          0
-#define ZV1_CAPTURE_CTRL_CS_8                           1
-#define ZV1_CAPTURE_CTRL_CF                             8:8
-#define ZV1_CAPTURE_CTRL_CF_YUV                         0
-#define ZV1_CAPTURE_CTRL_CF_RGB                         1
-#define ZV1_CAPTURE_CTRL_FS                             7:7
-#define ZV1_CAPTURE_CTRL_FS_DISABLE                     0
-#define ZV1_CAPTURE_CTRL_FS_ENABLE                      1
-#define ZV1_CAPTURE_CTRL_WEAVE                          6:6
-#define ZV1_CAPTURE_CTRL_WEAVE_DISABLE                  0
-#define ZV1_CAPTURE_CTRL_WEAVE_ENABLE                   1
-#define ZV1_CAPTURE_CTRL_BOB                            5:5
-#define ZV1_CAPTURE_CTRL_BOB_DISABLE                    0
-#define ZV1_CAPTURE_CTRL_BOB_ENABLE                     1
-#define ZV1_CAPTURE_CTRL_DB                             4:4
-#define ZV1_CAPTURE_CTRL_DB_DISABLE                     0
-#define ZV1_CAPTURE_CTRL_DB_ENABLE                      1
-#define ZV1_CAPTURE_CTRL_CC                             3:3
-#define ZV1_CAPTURE_CTRL_CC_CONTINUE                    0
-#define ZV1_CAPTURE_CTRL_CC_CONDITION                   1
-#define ZV1_CAPTURE_CTRL_RGB                            2:2
-#define ZV1_CAPTURE_CTRL_RGB_DISABLE                    0
-#define ZV1_CAPTURE_CTRL_RGB_ENABLE                     1
-#define ZV1_CAPTURE_CTRL_656                            1:1
-#define ZV1_CAPTURE_CTRL_656_DISABLE                    0
-#define ZV1_CAPTURE_CTRL_656_ENABLE                     1
-#define ZV1_CAPTURE_CTRL_CAP                            0:0
-#define ZV1_CAPTURE_CTRL_CAP_DISABLE                    0
-#define ZV1_CAPTURE_CTRL_CAP_ENABLE                     1
+#define ZV1_CAPTURE_CTRL_FIELD_INPUT                    BIT(27)
+#define ZV1_CAPTURE_CTRL_SCAN                           BIT(26)
+#define ZV1_CAPTURE_CTRL_CURRENT_BUFFER                 BIT(25)
+#define ZV1_CAPTURE_CTRL_VERTICAL_SYNC                  BIT(24)
+#define ZV1_CAPTURE_CTRL_PANEL                          BIT(20)
+#define ZV1_CAPTURE_CTRL_ADJ                            BIT(19)
+#define ZV1_CAPTURE_CTRL_HA                             BIT(18)
+#define ZV1_CAPTURE_CTRL_VSK                            BIT(17)
+#define ZV1_CAPTURE_CTRL_HSK                            BIT(16)
+#define ZV1_CAPTURE_CTRL_FD                             BIT(15)
+#define ZV1_CAPTURE_CTRL_VP                             BIT(14)
+#define ZV1_CAPTURE_CTRL_HP                             BIT(13)
+#define ZV1_CAPTURE_CTRL_CP                             BIT(12)
+#define ZV1_CAPTURE_CTRL_UVS                            BIT(11)
+#define ZV1_CAPTURE_CTRL_BS                             BIT(10)
+#define ZV1_CAPTURE_CTRL_CS                             BIT(9)
+#define ZV1_CAPTURE_CTRL_CF                             BIT(8)
+#define ZV1_CAPTURE_CTRL_FS                             BIT(7)
+#define ZV1_CAPTURE_CTRL_WEAVE                          BIT(6)
+#define ZV1_CAPTURE_CTRL_BOB                            BIT(5)
+#define ZV1_CAPTURE_CTRL_DB                             BIT(4)
+#define ZV1_CAPTURE_CTRL_CC                             BIT(3)
+#define ZV1_CAPTURE_CTRL_RGB                            BIT(2)
+#define ZV1_CAPTURE_CTRL_656                            BIT(1)
+#define ZV1_CAPTURE_CTRL_CAP                            BIT(0)
 
 #define ZV1_CAPTURE_CLIP                                0x098004
 #define ZV1_CAPTURE_CLIP_YCLIP                          25:16
 #define ZV1_CAPTURE_SIZE_WIDTH                          10:0
 
 #define ZV1_CAPTURE_BUF0_ADDRESS                        0x09800C
-#define ZV1_CAPTURE_BUF0_ADDRESS_STATUS                 31:31
-#define ZV1_CAPTURE_BUF0_ADDRESS_STATUS_CURRENT         0
-#define ZV1_CAPTURE_BUF0_ADDRESS_STATUS_PENDING         1
-#define ZV1_CAPTURE_BUF0_ADDRESS_EXT                    27:27
-#define ZV1_CAPTURE_BUF0_ADDRESS_EXT_LOCAL              0
-#define ZV1_CAPTURE_BUF0_ADDRESS_EXT_EXTERNAL           1
-#define ZV1_CAPTURE_BUF0_ADDRESS_CS                     26:26
-#define ZV1_CAPTURE_BUF0_ADDRESS_CS_0                   0
-#define ZV1_CAPTURE_BUF0_ADDRESS_CS_1                   1
+#define ZV1_CAPTURE_BUF0_ADDRESS_STATUS                 BIT(31)
+#define ZV1_CAPTURE_BUF0_ADDRESS_EXT                    BIT(27)
+#define ZV1_CAPTURE_BUF0_ADDRESS_CS                     BIT(26)
 #define ZV1_CAPTURE_BUF0_ADDRESS_ADDRESS                25:0
 
 #define ZV1_CAPTURE_BUF1_ADDRESS                        0x098010
-#define ZV1_CAPTURE_BUF1_ADDRESS_STATUS                 31:31
-#define ZV1_CAPTURE_BUF1_ADDRESS_STATUS_CURRENT         0
-#define ZV1_CAPTURE_BUF1_ADDRESS_STATUS_PENDING         1
-#define ZV1_CAPTURE_BUF1_ADDRESS_EXT                    27:27
-#define ZV1_CAPTURE_BUF1_ADDRESS_EXT_LOCAL              0
-#define ZV1_CAPTURE_BUF1_ADDRESS_EXT_EXTERNAL           1
-#define ZV1_CAPTURE_BUF1_ADDRESS_CS                     26:26
-#define ZV1_CAPTURE_BUF1_ADDRESS_CS_0                   0
-#define ZV1_CAPTURE_BUF1_ADDRESS_CS_1                   1
+#define ZV1_CAPTURE_BUF1_ADDRESS_STATUS                 BIT(31)
+#define ZV1_CAPTURE_BUF1_ADDRESS_EXT                    BIT(27)
+#define ZV1_CAPTURE_BUF1_ADDRESS_CS                     BIT(26)
 #define ZV1_CAPTURE_BUF1_ADDRESS_ADDRESS                25:0
 
 #define ZV1_CAPTURE_BUF_OFFSET                          0x098014
 #define ZV1_CAPTURE_YRGB_CONST_B                        7:0
 
 #define DMA_1_SOURCE                                    0x0D0010
-#define DMA_1_SOURCE_ADDRESS_EXT                        27:27
-#define DMA_1_SOURCE_ADDRESS_EXT_LOCAL                  0
-#define DMA_1_SOURCE_ADDRESS_EXT_EXTERNAL               1
-#define DMA_1_SOURCE_ADDRESS_CS                         26:26
-#define DMA_1_SOURCE_ADDRESS_CS_0                       0
-#define DMA_1_SOURCE_ADDRESS_CS_1                       1
+#define DMA_1_SOURCE_ADDRESS_EXT                        BIT(27)
+#define DMA_1_SOURCE_ADDRESS_CS                         BIT(26)
 #define DMA_1_SOURCE_ADDRESS                            25:0
 
 #define DMA_1_DESTINATION                               0x0D0014
-#define DMA_1_DESTINATION_ADDRESS_EXT                   27:27
-#define DMA_1_DESTINATION_ADDRESS_EXT_LOCAL             0
-#define DMA_1_DESTINATION_ADDRESS_EXT_EXTERNAL          1
-#define DMA_1_DESTINATION_ADDRESS_CS                    26:26
-#define DMA_1_DESTINATION_ADDRESS_CS_0                  0
-#define DMA_1_DESTINATION_ADDRESS_CS_1                  1
+#define DMA_1_DESTINATION_ADDRESS_EXT                   BIT(27)
+#define DMA_1_DESTINATION_ADDRESS_CS                    BIT(26)
 #define DMA_1_DESTINATION_ADDRESS                       25:0
 
 #define DMA_1_SIZE_CONTROL                              0x0D0018
-#define DMA_1_SIZE_CONTROL_STATUS                       31:31
-#define DMA_1_SIZE_CONTROL_STATUS_IDLE                  0
-#define DMA_1_SIZE_CONTROL_STATUS_ACTIVE                1
+#define DMA_1_SIZE_CONTROL_STATUS                       BIT(31)
 #define DMA_1_SIZE_CONTROL_SIZE                         23:0
 
 #define DMA_ABORT_INTERRUPT                             0x0D0020
 
 
 #define GPIO_DATA_SM750LE                               0x020018
-#define GPIO_DATA_SM750LE_1                             1:1
-#define GPIO_DATA_SM750LE_0                             0:0
+#define GPIO_DATA_SM750LE_1                             BIT(1)
+#define GPIO_DATA_SM750LE_0                             BIT(0)
 
 #define GPIO_DATA_DIRECTION_SM750LE                     0x02001C
-#define GPIO_DATA_DIRECTION_SM750LE_1                   1:1
-#define GPIO_DATA_DIRECTION_SM750LE_1_INPUT             0
-#define GPIO_DATA_DIRECTION_SM750LE_1_OUTPUT            1
-#define GPIO_DATA_DIRECTION_SM750LE_0                   0:0
-#define GPIO_DATA_DIRECTION_SM750LE_0_INPUT             0
-#define GPIO_DATA_DIRECTION_SM750LE_0_OUTPUT            1
+#define GPIO_DATA_DIRECTION_SM750LE_1                   BIT(1)
+#define GPIO_DATA_DIRECTION_SM750LE_0                   BIT(0)
 
 
 #endif
index 47b1a27..6ff81bc 100644 (file)
 
 #define DE_CLIP_TL                                      0x00002C
 #define DE_CLIP_TL_TOP                                  31:16
-#define DE_CLIP_TL_STATUS                               13:13
-#define DE_CLIP_TL_STATUS_DISABLE                       0
-#define DE_CLIP_TL_STATUS_ENABLE                        1
-#define DE_CLIP_TL_INHIBIT                              12:12
-#define DE_CLIP_TL_INHIBIT_OUTSIDE                      0
-#define DE_CLIP_TL_INHIBIT_INSIDE                       1
+#define DE_CLIP_TL_STATUS                               BIT(13)
+#define DE_CLIP_TL_INHIBIT                              BIT(12)
 #define DE_CLIP_TL_LEFT                                 11:0
 
 #define DE_CLIP_BR                                      0x000030
 #define DE_WINDOW_WIDTH_SRC_MASK                        0x1fff
 
 #define DE_WINDOW_SOURCE_BASE                           0x000040
-#define DE_WINDOW_SOURCE_BASE_EXT                       27:27
-#define DE_WINDOW_SOURCE_BASE_EXT_LOCAL                 0
-#define DE_WINDOW_SOURCE_BASE_EXT_EXTERNAL              1
-#define DE_WINDOW_SOURCE_BASE_CS                        26:26
-#define DE_WINDOW_SOURCE_BASE_CS_0                      0
-#define DE_WINDOW_SOURCE_BASE_CS_1                      1
+#define DE_WINDOW_SOURCE_BASE_EXT                       BIT(27)
+#define DE_WINDOW_SOURCE_BASE_CS                        BIT(26)
 #define DE_WINDOW_SOURCE_BASE_ADDRESS                   25:0
 
 #define DE_WINDOW_DESTINATION_BASE                      0x000044
-#define DE_WINDOW_DESTINATION_BASE_EXT                  27:27
-#define DE_WINDOW_DESTINATION_BASE_EXT_LOCAL            0
-#define DE_WINDOW_DESTINATION_BASE_EXT_EXTERNAL         1
-#define DE_WINDOW_DESTINATION_BASE_CS                   26:26
-#define DE_WINDOW_DESTINATION_BASE_CS_0                 0
-#define DE_WINDOW_DESTINATION_BASE_CS_1                 1
+#define DE_WINDOW_DESTINATION_BASE_EXT                  BIT(27)
+#define DE_WINDOW_DESTINATION_BASE_CS                   BIT(26)
 #define DE_WINDOW_DESTINATION_BASE_ADDRESS              25:0
 
 #define DE_ALPHA                                        0x000048
 #define DE_WRAP_Y                                       15:0
 
 #define DE_STATUS                                       0x000050
-#define DE_STATUS_CSC                                   1:1
-#define DE_STATUS_CSC_CLEAR                             0
-#define DE_STATUS_CSC_NOT_ACTIVE                        0
-#define DE_STATUS_CSC_ACTIVE                            1
-#define DE_STATUS_2D                                    0:0
-#define DE_STATUS_2D_CLEAR                              0
-#define DE_STATUS_2D_NOT_ACTIVE                         0
-#define DE_STATUS_2D_ACTIVE                             1
-
-
+#define DE_STATUS_CSC                                   BIT(1)
+#define DE_STATUS_2D                                    BIT(0)
 
 /* blt direction */
 #define TOP_TO_BOTTOM 0