MIPS: Add perf counter feature

Add CPU feature for standard MIPS r2 performance counters, as determined
by the Config1.PC bit. Both perf_events and oprofile probe this bit, so
lets combine the probing and change both to use cpu_has_perf.

This will also be used for VZ support in KVM to know whether performance
counters exist which can be exposed to guests.

[ralf@linux-mips.org: resolve conflict.]

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Robert Richter <rric@kernel.org>
Cc: linux-mips@linux-mips.org
Cc: oprofile-list@lists.sf.net
Patchwork: https://patchwork.linux-mips.org/patch/13226/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
index 7962b25..232b037 100644 (file)
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -454,4 +454,8 @@
 # define cpu_has_contextconfig (cpu_data[0].options & MIPS_CPU_CTXTC)
 #endif
 
+#ifndef cpu_has_perf
+# define cpu_has_perf          (cpu_data[0].options & MIPS_CPU_PERF)
+#endif
+
 #endif /* __ASM_CPU_FEATURES_H */

diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index ddcb2ab..3971a25 100644 (file)
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -408,6 +408,7 @@ enum cpu_type_enum {
 #define MIPS_CPU_BADINSTR      MBIT_ULL(44)    /* CPU has BadInstr register */
 #define MIPS_CPU_BADINSTRP     MBIT_ULL(45)    /* CPU has BadInstrP register */
 #define MIPS_CPU_CTXTC         MBIT_ULL(46)    /* CPU has [X]ConfigContext registers */
+#define MIPS_CPU_PERF          MBIT_ULL(47)    /* CPU has MIPS performance counters */
 
 /*
  * CPU ASE encodings

diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 963ce7e..45770d8 100644 (file)
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -648,6 +648,8 @@ static inline unsigned int decode_config1(struct cpuinfo_mips *c)
 
        if (config1 & MIPS_CONF1_MD)
                c->ases |= MIPS_ASE_MDMX;
+       if (config1 & MIPS_CONF1_PC)
+               c->options |= MIPS_CPU_PERF;
        if (config1 & MIPS_CONF1_WR)
                c->options |= MIPS_CPU_WATCH;
        if (config1 & MIPS_CONF1_CA)

diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c
index 656769c..302af8c 100644 (file)
--- a/arch/mips/kernel/perf_event_mipsxx.c
+++ b/arch/mips/kernel/perf_event_mipsxx.c
@@ -101,8 +101,6 @@ struct mips_pmu {
 
 static struct mips_pmu mipspmu;
 
-#define M_CONFIG1_PC   (1 << 4)
-
 #define M_PERFCTL_EXL                  (1      <<  0)
 #define M_PERFCTL_KERNEL               (1      <<  1)
 #define M_PERFCTL_SUPERVISOR           (1      <<  2)
@@ -754,7 +752,7 @@ static void handle_associated_event(struct cpu_hw_events *cpuc,
 
 static int __n_counters(void)
 {
-       if (!(read_c0_config1() & M_CONFIG1_PC))
+       if (!cpu_has_perf)
                return 0;
        if (!(read_c0_perfctrl0() & M_PERFCTL_MORE))
                return 1;

diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c
index 8f988a6..45cb274 100644 (file)
--- a/arch/mips/oprofile/op_model_mipsxx.c
+++ b/arch/mips/oprofile/op_model_mipsxx.c
@@ -269,11 +269,9 @@ static int mipsxx_perfcount_handler(void)
        return handled;
 }
 
-#define M_CONFIG1_PC   (1 << 4)
-
 static inline int __n_counters(void)
 {
-       if (!(read_c0_config1() & M_CONFIG1_PC))
+       if (!cpu_has_perf)
                return 0;
        if (!(read_c0_perfctrl0() & M_PERFCTL_MORE))
                return 1;