drm/amdgpu: bypass vce clock if vce is idle on Fiji.
authorRex Zhu <Rex.Zhu@amd.com>
Sat, 24 Sep 2016 08:34:59 +0000 (16:34 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 27 Sep 2016 17:00:48 +0000 (13:00 -0400)
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

index a6b4e27..3f6db4e 100644 (file)
@@ -716,7 +716,8 @@ static int vce_v3_0_set_clockgating_state(void *handle,
        int i;
 
        if ((adev->asic_type == CHIP_POLARIS10) ||
-           (adev->asic_type == CHIP_TONGA))
+               (adev->asic_type == CHIP_TONGA) ||
+               (adev->asic_type == CHIP_FIJI))
                vce_v3_0_set_bypass_mode(adev, enable);
 
        if (!(adev->cg_flags & AMD_CG_SUPPORT_VCE_MGCG))