CHROMIUM: arm: s5p: fix section mismatch for gpioint
authorVincent Palatin <vpalatin@chromium.org>
Fri, 22 Feb 2013 17:01:33 +0000 (09:01 -0800)
committerChromeBot <chrome-bot@google.com>
Fri, 22 Feb 2013 21:45:18 +0000 (13:45 -0800)
The gpioint irq creation might be called from hotpluggable devices,
so it needs to be marked as __devinit (and as nothing in the future).

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:12625
TEST=emerge-daisy_spring chromeos-kernel with
"CONFIG_DEBUG_SECTION_MISMATCH=y" and do not see any warning.

Change-Id: Ibc0880c90a4002063fd95e752e3fe417455afd22
Reviewed-on: https://gerrit.chromium.org/gerrit/43786
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>

arch/arm/plat-s5p/irq-gpioint.c

index 48f5b2f..d38d6eb 100644 (file)
@@ -120,7 +120,7 @@ static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc)
        chained_irq_exit(chip, desc);
 }
 
-static __init int s5p_gpioint_add(struct samsung_gpio_chip *chip)
+static __devinit int s5p_gpioint_add(struct samsung_gpio_chip *chip)
 {
        static int used_gpioint_groups = 0;
        int group = chip->group;
@@ -183,7 +183,7 @@ static __init int s5p_gpioint_add(struct samsung_gpio_chip *chip)
        return 0;
 }
 
-int __init s5p_register_gpio_interrupt(int pin)
+int __devinit s5p_register_gpio_interrupt(int pin)
 {
        struct samsung_gpio_chip *my_chip = samsung_gpiolib_getchip(pin);
        int offset, group;
@@ -210,7 +210,8 @@ int __init s5p_register_gpio_interrupt(int pin)
        return ret;
 }
 
-int __init s5p_register_gpioint_bank(int chain_irq, int start, int nr_groups)
+int __devinit s5p_register_gpioint_bank(int chain_irq, int start,
+                                       int nr_groups)
 {
        struct s5p_gpioint_bank *bank;