ARM: dts: imx6dl: correct cpufreq volt/freq table
authorAnson Huang <b20788@freescale.com>
Fri, 5 Dec 2014 08:23:49 +0000 (16:23 +0800)
committerShawn Guo <shawn.guo@linaro.org>
Mon, 5 Jan 2015 12:43:49 +0000 (20:43 +0800)
Currently the cpufreq volt/freq table we used is
for LDO enable mode, according to latest datasheet
Rev. 3, 03/2014, the volt/freq table is as below:

LDO enabled(min value):
996MHz: VDDARM: 1.225V, VDDSOC: 1.150V;
792MHz: VDDARM: 1.150V, VDDSOC: 1.150V;
396MHz: VDDARM: 1.050V, VDDSOC: 1.150V;

LDO bypassed(min value):
996MHz: VDDARM: 1.250V, VDDSOC: 1.150V;
792MHz: VDDARM: 1.150V, VDDSOC: 1.150V;
396MHz: VDDARM: 1.050V, VDDSOC: 1.150V;

Adding 25mV to cover board IR drop, for LDO enabled
mode of 996MHz, VDDARM should be 1.250V, so this
patch updates it.

Signed-off-by: Anson Huang <b20788@freescale.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
arch/arm/boot/dts/imx6dl.dtsi

index 1ac2fe7..f94bf72 100644 (file)
@@ -28,7 +28,7 @@
                        next-level-cache = <&L2>;
                        operating-points = <
                                /* kHz    uV */
-                               996000  1275000
+                               996000  1250000
                                792000  1175000
                                396000  1075000
                        >;