MIPS: CPS: Initialize EVA before bringing up VPEs from secondary cores
authorMarkos Chandras <markos.chandras@imgtec.com>
Mon, 21 Jul 2014 13:35:56 +0000 (14:35 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Tue, 19 Aug 2014 16:24:41 +0000 (18:24 +0200)
The CPS code is doing several memory loads when configuring the VPEs
from secondary cores, so the segmentation control registers must be
initialized in time otherwise the kernel will crash with strange
TLB exceptions.

Reviewed-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Patchwork: http://patchwork.linux-mips.org/patch/7424/
Signed-off-by: James Hogan <james.hogan@imgtec.com>
arch/mips/kernel/cps-vec.S

index 6f4f739..e6e97d2 100644 (file)
@@ -13,6 +13,7 @@
 #include <asm/asm-offsets.h>
 #include <asm/asmmacro.h>
 #include <asm/cacheops.h>
+#include <asm/eva.h>
 #include <asm/mipsregs.h>
 #include <asm/mipsmtregs.h>
 #include <asm/pm.h>
@@ -166,6 +167,9 @@ dcache_done:
 1:     jal     mips_cps_core_init
         nop
 
+       /* Do any EVA initialization if necessary */
+       eva_init
+
        /*
         * Boot any other VPEs within this core that should be online, and
         * deactivate this VPE if it should be offline.