ASoC: cs4265: Fix register address to set the proper data type.
authorPaul Handrigan <Paul.Handrigan@cirrus.com>
Thu, 11 Sep 2014 14:52:46 +0000 (09:52 -0500)
committerMark Brown <broonie@kernel.org>
Thu, 11 Sep 2014 16:17:31 +0000 (17:17 +0100)
The SPDIF control register must be written to set the data type in hw_params
not the ADC control register.

Signed-off-by: Paul Handrigan <Paul.Handrigan@cirrus.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
sound/soc/codecs/cs4265.c

index a20b30c..367242a 100644 (file)
@@ -458,12 +458,12 @@ static int cs4265_pcm_hw_params(struct snd_pcm_substream *substream,
                if (params_width(params) == 16) {
                        snd_soc_update_bits(codec, CS4265_DAC_CTL,
                                CS4265_DAC_CTL_DIF, (1 << 5));
-                       snd_soc_update_bits(codec, CS4265_ADC_CTL,
+                       snd_soc_update_bits(codec, CS4265_SPDIF_CTL2,
                                CS4265_SPDIF_CTL2_DIF, (1 << 7));
                } else {
                        snd_soc_update_bits(codec, CS4265_DAC_CTL,
                                CS4265_DAC_CTL_DIF, (3 << 5));
-                       snd_soc_update_bits(codec, CS4265_ADC_CTL,
+                       snd_soc_update_bits(codec, CS4265_SPDIF_CTL2,
                                CS4265_SPDIF_CTL2_DIF, (1 << 7));
                }
                break;
@@ -472,7 +472,7 @@ static int cs4265_pcm_hw_params(struct snd_pcm_substream *substream,
                        CS4265_DAC_CTL_DIF, 0);
                snd_soc_update_bits(codec, CS4265_ADC_CTL,
                        CS4265_ADC_DIF, 0);
-               snd_soc_update_bits(codec, CS4265_ADC_CTL,
+               snd_soc_update_bits(codec, CS4265_SPDIF_CTL2,
                        CS4265_SPDIF_CTL2_DIF, (1 << 6));
 
                break;