ARM: dts: arm: orion5x: Add DT include for mv88f5181

Common definitions for the SoC for board definitions to use.

[gregory.clement@free-electrons.com: fix commit title]
Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

diff --git a/Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.txt b/Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.txt
index a888011..ff3c120 100644 (file)
--- a/Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.txt
+++ b/Documentation/devicetree/bindings/arm/marvell/marvell,orion5x.txt
@@ -9,6 +9,7 @@ compatible: must contain "marvell,orion5x"
 In addition, the above compatible shall be extended with the specific
 SoC. Currently known SoC compatibles are:
 
+"marvell,orion5x-88f5181"
 "marvell,orion5x-88f5182"
 
 And in addition, the compatible shall be extended with the specific

diff --git a/arch/arm/boot/dts/orion5x-mv88f5181.dtsi b/arch/arm/boot/dts/orion5x-mv88f5181.dtsi
new file mode 100644 (file)
index 0000000..f667012
--- /dev/null
+++ b/arch/arm/boot/dts/orion5x-mv88f5181.dtsi
@@ -0,0 +1,49 @@
+/*
+ * Copyright (C) 2016 Jamie Lentin <jm@lentin.co.uk>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include "orion5x.dtsi"
+
+/ {
+       compatible = "marvell,orion5x-88f5181", "marvell,orion5x";
+
+       soc {
+               compatible = "marvell,orion5x-88f5181-mbus", "simple-bus";
+
+               internal-regs {
+                       pinctrl: pinctrl@10000 {
+                               compatible = "marvell,88f5181-pinctrl";
+                               reg = <0x10000 0x8>, <0x10050 0x4>;
+                       };
+
+                       core_clk: core-clocks@10030 {
+                               compatible = "marvell,mv88f5181-core-clock";
+                               reg = <0x10010 0x4>;
+                               #clock-cells = <1>;
+                       };
+
+                       mbusc: mbus-controller@20000 {
+                               compatible = "marvell,mbus-controller";
+                               reg = <0x20000 0x100>, <0x1500 0x20>;
+                       };
+               };
+       };
+};
+
+&pinctrl {
+       pmx_ge: pmx-ge {
+               marvell,pins = "mpp8", "mpp9", "mpp10", "mpp11",
+                              "mpp12", "mpp13", "mpp14", "mpp15",
+                              "mpp16", "mpp17", "mpp18", "mpp19";
+               marvell,function = "ge";
+       };
+};
+
+&eth {
+       pinctrl-0 = <&pmx_ge>;
+       pinctrl-names = "default";
+};