ARM: dts: r7s72100: add ethernet clock to device tree
authorChris Brandt <chris.brandt@renesas.com>
Fri, 2 Sep 2016 01:40:10 +0000 (21:40 -0400)
committerSimon Horman <horms+renesas@verge.net.au>
Mon, 5 Sep 2016 12:32:39 +0000 (14:32 +0200)
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm/boot/dts/r7s72100.dtsi
include/dt-bindings/clock/r7s72100-clock.h

index e8e2a5d..6d29e8f 100644 (file)
                        clock-output-names = "scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scif6", "scif7";
                };
 
+               mstp7_clks: mstp7_clks@fcfe0430 {
+                       #clock-cells = <1>;
+                       compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
+                       reg = <0xfcfe0430 4>;
+                       clocks = <&p0_clk>;
+                       clock-indices = <R7S72100_CLK_ETHER>;
+                       clock-output-names = "ether";
+               };
+
                mstp9_clks: mstp9_clks@fcfe0438 {
                        #clock-cells = <1>;
                        compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
index 5128f4d..3cd8138 100644 (file)
@@ -25,6 +25,9 @@
 #define R7S72100_CLK_SCIF6     1
 #define R7S72100_CLK_SCIF7     0
 
+/* MSTP7 */
+#define R7S72100_CLK_ETHER     4
+
 /* MSTP9 */
 #define R7S72100_CLK_I2C0      7
 #define R7S72100_CLK_I2C1      6