drm/i915: Add HAS_CORE_RING_FREQ macro
authorAkash Goel <akash.goel@intel.com>
Mon, 29 Jun 2015 09:20:23 +0000 (14:50 +0530)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 14 Jul 2015 16:19:25 +0000 (18:19 +0200)
Added a new HAS_CORE_RING_FREQ macro, currently used in
gen6_update_ring_freq & i915_ring_freq_table debugfs function.
The programming & read of ring frequency table is needed for newer
GEN(>=6) platforms, except VLV/CHV.

Issue: VIZ-5144
Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Akash Goel <akash.goel@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_debugfs.c
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/intel_pm.c

index 27f0a0d..f3f014d 100644 (file)
@@ -1784,7 +1784,7 @@ static int i915_ring_freq_table(struct seq_file *m, void *unused)
        int gpu_freq, ia_freq;
        unsigned int max_gpu_freq, min_gpu_freq;
 
-       if (!(IS_GEN6(dev) || IS_GEN7(dev))) {
+       if (!HAS_CORE_RING_FREQ(dev)) {
                seq_puts(m, "unsupported on this chipset\n");
                return 0;
        }
index 45bbc19..6611356 100644 (file)
@@ -2548,6 +2548,9 @@ struct drm_i915_cmd_table {
 #define HAS_RESOURCE_STREAMER(dev) (IS_HASWELL(dev) || \
                                    INTEL_INFO(dev)->gen >= 8)
 
+#define HAS_CORE_RING_FREQ(dev)        (INTEL_INFO(dev)->gen >= 6 && \
+                                !IS_VALLEYVIEW(dev))
+
 #define INTEL_PCH_DEVICE_ID_MASK               0xff00
 #define INTEL_PCH_IBX_DEVICE_ID_TYPE           0x3b00
 #define INTEL_PCH_CPT_DEVICE_ID_TYPE           0x1c00
index f2be1ce..0259785 100644 (file)
@@ -5104,7 +5104,7 @@ void gen6_update_ring_freq(struct drm_device *dev)
 {
        struct drm_i915_private *dev_priv = dev->dev_private;
 
-       if (INTEL_INFO(dev)->gen < 6 || IS_VALLEYVIEW(dev))
+       if (!HAS_CORE_RING_FREQ(dev))
                return;
 
        mutex_lock(&dev_priv->rps.hw_lock);