USB: EHCI: define extension registers like normal ones
authorAlan Stern <stern@rowland.harvard.edu>
Mon, 25 Jun 2012 16:19:03 +0000 (12:19 -0400)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 27 Jun 2012 02:42:11 +0000 (19:42 -0700)
This patch (as1562) cleans up the definitions of the EHCI extended
registers to be consistent with the definitions of the standard
registers.  This makes the code look a lot nicer, with no functional
change.

Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/usb/host/ehci-hcd.c
drivers/usb/host/ehci-hub.c
include/linux/usb/ehci_def.h

index 800be38..c49fc1e 100644 (file)
@@ -203,11 +203,9 @@ static int handshake (struct ehci_hcd *ehci, void __iomem *ptr,
 /* check TDI/ARC silicon is in host mode */
 static int tdi_in_host_mode (struct ehci_hcd *ehci)
 {
-       u32 __iomem     *reg_ptr;
        u32             tmp;
 
-       reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE);
-       tmp = ehci_readl(ehci, reg_ptr);
+       tmp = ehci_readl(ehci, &ehci->regs->usbmode);
        return (tmp & 3) == USBMODE_CM_HC;
 }
 
@@ -303,11 +301,9 @@ static int handshake_on_error_set_halt(struct ehci_hcd *ehci, void __iomem *ptr,
 /* put TDI/ARC silicon into EHCI mode */
 static void tdi_reset (struct ehci_hcd *ehci)
 {
-       u32 __iomem     *reg_ptr;
        u32             tmp;
 
-       reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE);
-       tmp = ehci_readl(ehci, reg_ptr);
+       tmp = ehci_readl(ehci, &ehci->regs->usbmode);
        tmp |= USBMODE_CM_HC;
        /* The default byte access to MMR space is LE after
         * controller reset. Set the required endian mode
@@ -315,7 +311,7 @@ static void tdi_reset (struct ehci_hcd *ehci)
         */
        if (ehci_big_endian_mmio(ehci))
                tmp |= USBMODE_BE;
-       ehci_writel(ehci, tmp, reg_ptr);
+       ehci_writel(ehci, tmp, &ehci->regs->usbmode);
 }
 
 /* reset a non-running (STS_HALT == 1) controller */
@@ -339,9 +335,8 @@ static int ehci_reset (struct ehci_hcd *ehci)
 
        if (ehci->has_hostpc) {
                ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
-                       (u32 __iomem *)(((u8 *)ehci->regs) + USBMODE_EX));
-               ehci_writel(ehci, TXFIFO_DEFAULT,
-                       (u32 __iomem *)(((u8 *)ehci->regs) + TXFILLTUNING));
+                               &ehci->regs->usbmode_ex);
+               ehci_writel(ehci, TXFIFO_DEFAULT, &ehci->regs->txfill_tuning);
        }
        if (retval)
                return retval;
index dd5eef6..db05e35 100644 (file)
@@ -149,10 +149,8 @@ static __maybe_unused void ehci_adjust_port_wakeup_flags(struct ehci_hcd *ehci,
        if (ehci->has_hostpc) {
                port = HCS_N_PORTS(ehci->hcs_params);
                while (port--) {
-                       u32 __iomem     *hostpc_reg;
+                       u32 __iomem     *hostpc_reg = &ehci->regs->hostpc[port];
 
-                       hostpc_reg = (u32 __iomem *)((u8 *) ehci->regs
-                                       + HOSTPC0 + 4 * port);
                        temp = ehci_readl(ehci, hostpc_reg);
                        ehci_writel(ehci, temp & ~HOSTPC_PHCD, hostpc_reg);
                }
@@ -185,10 +183,8 @@ static __maybe_unused void ehci_adjust_port_wakeup_flags(struct ehci_hcd *ehci,
        if (ehci->has_hostpc) {
                port = HCS_N_PORTS(ehci->hcs_params);
                while (port--) {
-                       u32 __iomem     *hostpc_reg;
+                       u32 __iomem     *hostpc_reg = &ehci->regs->hostpc[port];
 
-                       hostpc_reg = (u32 __iomem *)((u8 *) ehci->regs
-                                       + HOSTPC0 + 4 * port);
                        temp = ehci_readl(ehci, hostpc_reg);
                        ehci_writel(ehci, temp | HOSTPC_PHCD, hostpc_reg);
                }
@@ -285,11 +281,9 @@ static int ehci_bus_suspend (struct usb_hcd *hcd)
 
                port = HCS_N_PORTS(ehci->hcs_params);
                while (port--) {
-                       u32 __iomem     *hostpc_reg;
+                       u32 __iomem     *hostpc_reg = &ehci->regs->hostpc[port];
                        u32             t3;
 
-                       hostpc_reg = (u32 __iomem *)((u8 *) ehci->regs
-                                       + HOSTPC0 + 4 * port);
                        t3 = ehci_readl(ehci, hostpc_reg);
                        ehci_writel(ehci, t3 | HOSTPC_PHCD, hostpc_reg);
                        t3 = ehci_readl(ehci, hostpc_reg);
@@ -388,10 +382,9 @@ static int ehci_bus_resume (struct usb_hcd *hcd)
                i = HCS_N_PORTS(ehci->hcs_params);
                while (i--) {
                        if (test_bit(i, &ehci->bus_suspended)) {
-                               u32 __iomem     *hostpc_reg;
+                               u32 __iomem     *hostpc_reg =
+                                                       &ehci->regs->hostpc[i];
 
-                               hostpc_reg = (u32 __iomem *)((u8 *) ehci->regs
-                                               + HOSTPC0 + 4 * i);
                                temp = ehci_readl(ehci, hostpc_reg);
                                ehci_writel(ehci, temp & ~HOSTPC_PHCD,
                                                hostpc_reg);
@@ -667,7 +660,7 @@ static int ehci_hub_control (
        int             ports = HCS_N_PORTS (ehci->hcs_params);
        u32 __iomem     *status_reg = &ehci->regs->port_status[
                                (wIndex & 0xff) - 1];
-       u32 __iomem     *hostpc_reg = NULL;
+       u32 __iomem     *hostpc_reg = &ehci->regs->hostpc[(wIndex & 0xff) - 1];
        u32             temp, temp1, status;
        unsigned long   flags;
        int             retval = 0;
@@ -680,9 +673,6 @@ static int ehci_hub_control (
         * power, "this is the one", etc.  EHCI spec supports this.
         */
 
-       if (ehci->has_hostpc)
-               hostpc_reg = (u32 __iomem *)((u8 *)ehci->regs
-                               + HOSTPC0 + 4 * ((wIndex & 0xff) - 1));
        spin_lock_irqsave (&ehci->lock, flags);
        switch (typeReq) {
        case ClearHubFeature:
@@ -734,7 +724,7 @@ static int ehci_hub_control (
                                goto error;
 
                        /* clear phy low-power mode before resume */
-                       if (hostpc_reg) {
+                       if (ehci->has_hostpc) {
                                temp1 = ehci_readl(ehci, hostpc_reg);
                                ehci_writel(ehci, temp1 & ~HOSTPC_PHCD,
                                                hostpc_reg);
@@ -984,7 +974,7 @@ static int ehci_hub_control (
                        temp &= ~PORT_WKCONN_E;
                        temp |= PORT_WKDISC_E | PORT_WKOC_E;
                        ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);
-                       if (hostpc_reg) {
+                       if (ehci->has_hostpc) {
                                spin_unlock_irqrestore(&ehci->lock, flags);
                                msleep(5);/* 5ms for HCD enter low pwr mode */
                                spin_lock_irqsave(&ehci->lock, flags);
index 7cc95ee..de4b9ed 100644 (file)
@@ -111,7 +111,13 @@ struct ehci_regs {
        /* ASYNCLISTADDR: offset 0x18 */
        u32             async_next;     /* address of next async queue head */
 
-       u32             reserved[9];
+       u32             reserved1[2];
+
+       /* TXFILLTUNING: offset 0x24 */
+       u32             txfill_tuning;  /* TX FIFO Tuning register */
+#define TXFIFO_DEFAULT (8<<16)         /* FIFO burst threshold 8 */
+
+       u32             reserved2[6];
 
        /* CONFIGFLAG: offset 0x40 */
        u32             configured_flag;
@@ -155,26 +161,34 @@ struct ehci_regs {
 #define PORT_CSC       (1<<1)          /* connect status change */
 #define PORT_CONNECT   (1<<0)          /* device connected */
 #define PORT_RWC_BITS   (PORT_CSC | PORT_PEC | PORT_OCC)
-};
 
-#define USBMODE                0x68            /* USB Device mode */
+       u32             reserved3[9];
+
+       /* USBMODE: offset 0x68 */
+       u32             usbmode;        /* USB Device mode */
 #define USBMODE_SDIS   (1<<3)          /* Stream disable */
 #define USBMODE_BE     (1<<2)          /* BE/LE endianness select */
 #define USBMODE_CM_HC  (3<<0)          /* host controller mode */
 #define USBMODE_CM_IDLE        (0<<0)          /* idle state */
 
+       u32             reserved4[7];
+
 /* Moorestown has some non-standard registers, partially due to the fact that
  * its EHCI controller has both TT and LPM support. HOSTPCx are extensions to
  * PORTSCx
  */
-#define HOSTPC0                0x84            /* HOSTPC extension */
+       /* HOSTPC: offset 0x84 */
+       u32             hostpc[0];      /* HOSTPC extension */
 #define HOSTPC_PHCD    (1<<22)         /* Phy clock disable */
 #define HOSTPC_PSPD    (3<<25)         /* Port speed detection */
-#define USBMODE_EX     0xc8            /* USB Device mode extension */
+
+       u32             reserved5[17];
+
+       /* USBMODE_EX: offset 0xc8 */
+       u32             usbmode_ex;     /* USB Device mode extension */
 #define USBMODE_EX_VBPS        (1<<5)          /* VBus Power Select On */
 #define USBMODE_EX_HC  (3<<0)          /* host controller mode */
-#define TXFILLTUNING   0x24            /* TX FIFO Tuning register */
-#define TXFIFO_DEFAULT (8<<16)         /* FIFO burst threshold 8 */
+};
 
 /* Appendix C, Debug port ... intended for use with special "debug devices"
  * that can help if there's no serial console.  (nonstandard enumeration.)