ASoC: rt5677: Add the chip type to distinguish the setting of the clock source
authorOder Chiou <oder_chiou@realtek.com>
Wed, 11 Feb 2015 11:18:51 +0000 (19:18 +0800)
committerMark Brown <broonie@kernel.org>
Mon, 2 Mar 2015 17:22:59 +0000 (17:22 +0000)
There is only one clock source in the rt5676, so the chip type is added to
distinguish the setting of the clock source in the VAD function.

Signed-off-by: Oder Chiou <oder_chiou@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/codecs/rt5677.c
sound/soc/codecs/rt5677.h

index 5d0bb87..ab62777 100644 (file)
@@ -718,11 +718,24 @@ static int rt5677_set_dsp_vad(struct snd_soc_codec *codec, bool on)
                        RT5677_LDO1_SEL_MASK, 0x0);
                regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2,
                        RT5677_PWR_LDO1, RT5677_PWR_LDO1);
-               regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1,
-                       RT5677_MCLK_SRC_MASK, RT5677_MCLK2_SRC);
-               regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK2,
-                       RT5677_PLL2_PR_SRC_MASK | RT5677_DSP_CLK_SRC_MASK,
-                       RT5677_PLL2_PR_SRC_MCLK2 | RT5677_DSP_CLK_SRC_BYPASS);
+               switch (rt5677->type) {
+               case RT5677:
+                       regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1,
+                               RT5677_MCLK_SRC_MASK, RT5677_MCLK2_SRC);
+                       regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK2,
+                               RT5677_PLL2_PR_SRC_MASK |
+                               RT5677_DSP_CLK_SRC_MASK,
+                               RT5677_PLL2_PR_SRC_MCLK2 |
+                               RT5677_DSP_CLK_SRC_BYPASS);
+                       break;
+               case RT5676:
+                       regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK2,
+                               RT5677_DSP_CLK_SRC_MASK,
+                               RT5677_DSP_CLK_SRC_BYPASS);
+                       break;
+               default:
+                       break;
+               }
                regmap_write(rt5677->regmap, RT5677_PWR_DSP2, 0x07ff);
                regmap_write(rt5677->regmap, RT5677_PWR_DSP1, 0x07fd);
                rt5677_set_dsp_mode(codec, true);
@@ -4733,7 +4746,8 @@ static const struct regmap_config rt5677_regmap = {
 };
 
 static const struct i2c_device_id rt5677_i2c_id[] = {
-       { "rt5677", 0 },
+       { "rt5677", RT5677 },
+       { "rt5676", RT5676 },
        { }
 };
 MODULE_DEVICE_TABLE(i2c, rt5677_i2c_id);
@@ -4850,6 +4864,8 @@ static int rt5677_i2c_probe(struct i2c_client *i2c,
 
        i2c_set_clientdata(i2c, rt5677);
 
+       rt5677->type = id->driver_data;
+
        if (pdata)
                rt5677->pdata = *pdata;
 
index c0a625f..07df96b 100644 (file)
@@ -1665,6 +1665,11 @@ enum {
        RT5677_IRQ_JD3,
 };
 
+enum rt5677_type {
+       RT5677,
+       RT5676,
+};
+
 struct rt5677_priv {
        struct snd_soc_codec *codec;
        struct rt5677_platform_data pdata;
@@ -1681,6 +1686,7 @@ struct rt5677_priv {
        int pll_in;
        int pll_out;
        int pow_ldo2; /* POW_LDO2 pin */
+       enum rt5677_type type;
 #ifdef CONFIG_GPIOLIB
        struct gpio_chip gpio_chip;
 #endif